Li memristor-based MOSFET synapse for linear I–V characteristic and processing analog input neuromorphic system

Abstract

In this research, we propose a method that can significantly improve the linearity of current–voltage characteristics (L–IV) of synapse devices. Considering that analog input data are dependent on the L–IV, synapse devices having non-linear current–voltage characteristics can result in drastic conductance variations during inference operations. It means that the L–IV is one of the key parameters in the synapse device. To improve the L–IV, a triode region of a metal oxide semiconductor field effect transistor (MOSFET) was utilized with a Li-ion-based memristor as a gate voltage divider, which results in gradual channel conductance changes (analog synaptic weights). The channel conductance of the MOSFET can be selectively controlled based on Li-ion intercalation and de-intercalation. A notably improved L–IV and analog synaptic weights were achieved, which enhanced the MNIST data set recognition accuracy from 35.8% to 92.03%.

CMOS-compatible compute-in-memory accelerators based on integrated ferroelectric synaptic arrays for convolution neural networks

“…Multiplication of the intensity values of the input pixels by the kernel weights can be achieved using Ohm’s law, and the accumulation can be achieved using Kirchhoff’s law ( 20 , 46 ). Thus, linear current-voltage characteristics are required for accurate convolution operations based on the VMM ( 21 , 24 , 47 , 48 ). The FeTFTs exhibited linear current-voltage characteristics at multiple states between the erased and programmed states (fig.…”

Role of the electrolyte layer in CMOS-compatible and oxide-based vertical three-terminal ECRAM

“…For 3T-ECRAM, the measured conductance indicates a horizontal conductance between S and D. In 2T-ECRAM, nonlinear conductance changes can result from the saturation of the conductance. 16,17,[27][28][29][30] Under the applied positive pulse bias, during potentiation, oxygen ions of the WO 3 channel layer are attracted to the Ta 2 O 5 oxygen reservoir, forming an interfacial oxide layer between the two layers (channel and oxygen reservoir layers). The interfacial oxide layer increases the total resistance (decreases the total conductance) and prevents the injection of additional oxygen ions into the oxygen reservoir.…”

Linear and Symmetric Li-Based Composite Memristors for Efficient Supervised Learning

“…8−11 These requirements represent significant material challenges that still need to be overcome for CAA-based MVM. Several strategies have been attempted for linear and symmetric memristor behavior, including floating MoS 2 synaptic transistors, 12 dual-gated memtransistors, 13,14 electrolyte-gated-transistor, 15,16 controlled filament diameter in SiGe memristors, 17 and optimized tunneling layers and metal contacts in metaloxide memristors. 9,11 In bipolar metal-oxide memristors, filamentary resistive switching behaviors are induced from oxidation and reduction of conducting paths by oxygen ion migration, in which the migration of oxygen ions is driven by an electric field, electrical current, and thermal effects (e.g., Joule heating).…”

“…However, an efficient MVM operation not only requires memristors to exhibit ohmic behavior in all resistance states but also symmetric and linear long-term potentiation/depression (LTP/LTD) characteristics following accurate blind update protocols. − These requirements represent significant material challenges that still need to be overcome for CAA-based MVM. Several strategies have been attempted for linear and symmetric memristor behavior, including floating MoS 2 synaptic transistors, dual-gated memtransistors, , electrolyte-gated-transistor, , controlled filament diameter in SiGe memristors, and optimized tunneling layers and metal contacts in metal-oxide memristors. , …”