LEGaTO: Low-Energy, Secure, and Resilient Toolset for Heterogeneous Computing

Salami, Behzad; Parasyris, Konstantinos; Cristal, Adrián; Ünsal, Osman; Martorell, Xavier; Carpenter, Paul; Cruz, R. de la; Bautista, Leonardo; Jiménez, Daniel; Álvarez, Carlos; Nabavi, Seyyed Yahya; Madonar, Sergi; Pericàs, Miquel; Trancoso, Pedro; Abduljabbar, Mustafa; Chen, J.; Soomro, Pirah Noor; Manivannan, Madhavan; Berge, Micha vor dem; Krupop, Stefan; Klawonn, F.; Mekhlafi, Al; May, Stefan; Becker, Tobias; Gaydadjiev, Georgi; Salomonsson, Hans; Dubhashi, Devdatt; Port, Oron; Etsion, Yoav; Quoc, Le; Fetzer, Christof; Kaiser, Martin; Kucza, Nils; Hagemeyer, Jens; Griessl, René; Tigges, Lennart; Mika, Katie; Huffmeier, A.; Pasin, Marcelo; Schiavoni, Valerio; Rocha, Isabelly; Göttel, Christian; Felber, Pascal

doi:10.23919/date48585.2020.9116362

Cited by 7 publications

(8 citation statements)

References 9 publications

(7 reference statements)

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“…Our work uses an industrial tool [122] that inherently exploits these techniques. • Undervolting: Undervolting has been shown to provide significant power-efficiency benefit for CNNs when applied to SRAMs [17], DRAMs [50], ASICs [68,132,128,17,48], and heterogeneous systems [24,25,100].…”

Section: Power-efficient Cnnsmentioning

confidence: 99%

An Experimental Study of Reduced-Voltage Operation in Modern FPGAs for Neural Network Acceleration

Salami¹,

Onural

Yüksel

et al. 2020

2020 50th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN)

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We empirically evaluate an undervolting technique, i.e., underscaling the circuit supply voltage below the nominal level, to improve the power-efficiency of Convolutional Neural Network (CNN) accelerators mapped to Field Programmable Gate Arrays (FPGAs). Undervolting below a safe voltage level can lead to timing faults due to excessive circuit latency increase. We evaluate the reliability-power trade-off for such accelerators. Specifically, we experimentally study the reduced-voltage operation of multiple components of real FPGAs, characterize the corresponding reliability behavior of CNN accelerators, propose techniques to minimize the drawbacks of reduced-voltage operation, and combine undervolting with architectural CNN optimization techniques, i.e., quantization and pruning. We investigate the effect of environmental temperature on the reliability-power trade-off of such accelerators.We perform experiments on three identical samples of modern Xilinx ZCU102 FPGA platforms with five state-of-the-art image classification CNN benchmarks. This approach allows us to study the effects of our undervolting technique for both software and hardware variability. We achieve more than 3X power-efficiency (GOPs/W ) gain via undervolting. 2.6X of this gain is the result of eliminating the voltage guardband region, i.e., the safe voltage region below the nominal level that is set by FPGA vendor to ensure correct functionality in worst-case environmental and circuit conditions. 43% of the power-efficiency gain is due to further undervolting below the guardband, which comes at the cost of accuracy loss in the CNN accelerator. We evaluate an effective frequency underscaling technique that prevents this accuracy loss, and find that it reduces the power-efficiency gain from 43% to 25%.

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Section: Power-efficient Cnnsmentioning

confidence: 99%

An Experimental Study of Reduced-Voltage Operation in Modern FPGAs for Neural Network Acceleration

Salami¹,

Onural

Yüksel

et al. 2020

2020 50th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN)

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“…Heterogeneity seems to represent the most promising way, e.g., by integrating CPUs (X86 or ARM), GPUs, and FPGA in a single platform [57]. Also, the great efforts in developing unified programming models and API supporting all these heterogeneous hardware architectures such as OpenCL, SYCL, and oneAPI [58] demonstrate this trend.…”

Section: Hpc Low-power Devicesmentioning

confidence: 99%

“…e Low-Energy Toolset for Heterogeneous Computing (LEGaTO) project has been funded by the European Union's Horizon 2020 research program between 2017 and 2020 to design and develop a software toolchain for energy-efficiency computing on heterogeneous hardware, i.e., a system equipped with CPUs, GPUs, and FPGA [57,85]. e toolchain was released in 2020, and it is available via GitHub [86].…”

Section: Integrated Solutionsmentioning

confidence: 99%

Hardware and Software Solutions for Energy-Efficient Computing in Scientific Programming

D’Agostino

Merelli

Aldinucci

et al. 2021

Scientific Programming

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Energy consumption is one of the major issues in today’s computer science, and an increasing number of scientific communities are interested in evaluating the tradeoff between time-to-solution and energy-to-solution. Despite, in the last two decades, computing which revolved around centralized computing infrastructures, such as supercomputing and data centers, the wide adoption of the Internet of Things (IoT) paradigm is currently inverting this trend due to the huge amount of data it generates, pushing computing power back to places where the data are generated—the so-called fog/edge computing. This shift towards a decentralized model requires an equivalent change in the software engineering paradigms, development environments, hardware tools, languages, and computation models for scientific programming because the local computational capabilities are typically limited and require a careful evaluation of power consumption. This paper aims to present how these concepts can be actually implemented in scientific software by presenting the state of the art of powerful, less power-hungry processors from one side and energy-aware tools and techniques from the other one.

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“…3. A smart mirror as example for a smart home application [6] edge processing unit, and actuator nodes are distributed over a local area and permanently connected to cloud services.…”

Section: Use Case 3: Smart Homementioning

confidence: 99%

Requirement Engineering Challenges for AI-intense Systems Development

Heyn¹,

Knauss²,

Muhammad³

et al. 2021

Preprint

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Availability of powerful computation and communication technology as well as advances in artificial intelligence enable a new generation of complex, AI-intense systems and applications. Such systems and applications promise exciting improvements on a societal level, yet they also bring with them new challenges for their development. In this paper we argue that significant challenges relate to defining and ensuring behaviour and quality attributes of such systems and applications. We specifically derive four challenge areas from relevant use cases of complex, AI-intense systems and applications related to industry, transportation, and home automation: understanding, determining, and specifying (i) contextual definitions and requirements, (ii) data attributes and requirements, (iii) performance definition and monitoring, and (iv) the impact of human factors on system acceptance and success. Solving these challenges will imply process support that integrates new requirements engineering methods into development approaches for complex, AI-intense systems and applications. We present these challenges in detail and propose a research roadmap.

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LEGaTO: Low-Energy, Secure, and Resilient Toolset for Heterogeneous Computing

Cited by 7 publications

References 9 publications

An Experimental Study of Reduced-Voltage Operation in Modern FPGAs for Neural Network Acceleration

An Experimental Study of Reduced-Voltage Operation in Modern FPGAs for Neural Network Acceleration

Hardware and Software Solutions for Energy-Efficient Computing in Scientific Programming

Requirement Engineering Challenges for AI-intense Systems Development

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