Learning-Based Run-Time Power and Energy Management of Multi/Many-Core Systems: Current and Future Trends

et al. 2019

IEEE Trans. VLSI Syst.

Self Cite

Current multi-core platforms contain different types of cores, organized in clusters (e.g., ARM's big.LITTLE). These platforms deal with concurrently executing applications, having varying workload profiles and performance requirements. Runtime management is imperative for adapting to such performance requirements, workload variabilities, and to increase energy and temperature efficiency. Temperature has also become a critical parameter since it affects reliability, power consumption and performance, and hence must be managed. This paper proposes an accurate temperature prediction scheme coupled with a runtime energy management approach to proactively avoid exceeding temperature thresholds while maintaining performance targets. Experiments show up to 20% energy savings while maintaining high temperature averages and peaks below the threshold. When compared to state-of-the-art temperature predictors, the present work predicts 35 % faster and reduces the mean absolute error from 3.25 • C to 1.15 • C for the evaluated applications scenarios.

Section: B Run Time Managementmentioning

confidence: 99%

Predictive Thermal Management for Energy-Efficient Execution of Concurrent Applications on Heterogeneous Multicores

Wächter

Bellefroid

et al. 2019

IEEE Trans. VLSI Syst.

Self Cite

“…For performing all the processing at run-time, several works have been reported [8], [15], [16], [22]- [24]. In [22], the online algorithm utilizes hardware performance monitoring counters (PMCs) to achieve energy savings without recompiling the applications.…”

Section: Related Workmentioning

confidence: 99%

“…The run-time overhead for application scenario bl-bo-fr, having a long execution time of 1053 sec is ∼0.17%, which is very minimal. Whereas, commonly used learning-based approaches have significant overheads (up to 216 sec for learning and 1 sec for subsequent stages) for a single-application scenario [16]), which gets further aggravated by dynamic workload variations causing frequent re-learning. Therefore, the scalability of such approaches in comparison to the proposed technique is limited for multicore platforms executing multiple multi-threaded applications concurrently.…”

Section: Run-time Overheadmentioning

confidence: 99%

“…Subsequently, it monitors the workload prediction error and performance loss, quantified by instructions per second (IPS) at runtime and adjusts the chosen V-f to compensate. The proposed approach shifts heavy computations to offline and thus helps in reducing the runtime overheads compared to learning-based approaches [8], [16]. The proposed approach is validated on the Odroid-XU3 platform with the various combinations of applications from PARSEC and SPLASH benchmarks.…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Inter-Cluster Thread-to-Core Mapping and DVFS on Heterogeneous Multi-Cores

IEEE Trans. Multi-Scale Comp. Syst.

Singh

Biswas

et al. 2018

Self Cite

Abstract-Heterogeneous multi-core platforms that contain different types of cores, organized as clusters, are emerging, e.g. ARM's big.LITTLE architecture. These platforms often need to deal with multiple applications, having different performance requirements, executing concurrently. This leads to generation of varying and mixed workloads (e.g. compute and memory intensive) due to resource sharing. Run-time management is required for adapting to such performance requirements and workload variabilities and to achieve energy efficiency. Moreover, the management becomes challenging when the applications are multi-threaded and the heterogeneity needs to be exploited. The existing run-time management approaches do not efficiently exploit cores situated in different clusters simultaneously (referred to as inter-cluster exploitation) and DVFS potential of cores, which is the aim of this paper. Such exploitation might help to satisfy the performance requirement while achieving energy savings at the same time. Therefore, in this paper, we propose a run-time management approach that first selects thread-to-core mapping based on the performance requirements and resource availability. Then, it applies online adaptation by adjusting the voltage-frequency (V-f) levels to achieve energy optimization, without trading-off application performance. For thread-to-core mapping, offline profiled results are used, which contain performance and energy characteristics of applications when executed on the heterogeneous platform by using different types of cores in various possible combinations. For an application, thread-to-core mapping process defines the number of used cores and their type, which are situated in different clusters. The online adaptation process classifies the inherent workload characteristics of concurrently executing applications, incurring a lower overhead than existing learning-based approaches as demonstrated in this paper. The classification of workload is performed using the metric Memory Reads Per Instruction (MRPI). The adaptation process pro-actively selects an appropriate V-f pair for a predicted workload. Subsequently, it monitors the workload prediction error and performance loss, quantified by instructions per second (IPS), and adjusts the chosen V-f to compensate. We validate the proposed run-time management approach on a hardware platform, the Odroid-XU3, with various combinations of multi-threaded applications from PARSEC and SPLASH benchmarks. Results show an average improvement in energy efficiency up to 33% compared to existing approaches while meeting the performance requirements.

“…Our approach is generic, but one time pro ling is required when the application or platform changes. In case a new application needs to be executed and its pro ling results are not available, the best e ort [33] or online learning heuristics [32] can be employed to obtain the mapping and repartition, but achieved results might not be e cient.…”

mentioning

confidence: 99%

Energy-Efficient Run-Time Mapping and Thread Partitioning of Concurrent OpenCL Applications on CPU-GPU MPSoCs

Singh

Prakash

ACM Trans. Embed. Comput. Syst.

et al. 2017

Self Cite

Heterogeneous Multi-Processor Systems-on-Chips (MPSoCs) containing CPU and GPU cores are typically required to execute applications concurrently. However, as will be shown in this paper, existing approaches are not well suited for concurrent applications as they are developed either by considering only a single application or they do not exploit both CPU and GPU cores at the same time. In this paper, we propose an energy-e cient run-time mapping and thread partitioning approach for executing concurrent OpenCL applications on both GPU and GPU cores while satisfying performance requirements. Depending upon the performance requirements, for each concurrently executing application, the mapping process nds the appropriate number of CPU cores and operating frequencies of CPU and GPU cores, and the partitioning process identi es an e cient partitioning of the applications' threads between CPU and GPU cores. We validate the proposed approach experimentally on the Odroid-XU3 hardware platform with various mixes of applications from the Polybench benchmark suite. Additionally, a case-study is performed with a real-world application SLAMBench. Results show an average energy saving of 32% compared to existing approaches while still satisfying the performance requirements.