Leakage current modeling of test structures for characterization of dark current in CMOS image sensors

Abstract

In this paper, we present an extensive study of leakage current mechanisms in diodes to model the dark current of various pixel architectures for active pixel CMOS image sensors. Dedicated test structures made in 0.35-m CMOS have been investigated to determine the various contributions to the leakage current. Three pixel variants with different photo diodes-n + /pwell, n + /nwell/psubstrate and p + /nwell/p-substrate-are described. We found that the main part of the total dark current is coming from the depletion of the photodiode edge at the surface. Furthermore, the source of the reset transistor contributes seriously to the total leakage current of a pixel. From the investigation of reverse current-voltage (-) characteristics, temperature dependencies of leakage current, and device simulations we found that for a wide depletion, such as n-well/p-well, thermal Shockley-Read-Hall generation is the main leakage mechanism, while for a junction with higher dope concentrations, such as n + /p-well or p + /n-well, tunneling and impact ionization are the dominant mechanisms. Index Terms-Image sensors, leakage currents, modeling. I. INTRODUCTION D ARK current is an important parameter to characterize the performance of an image sensor. Lowering the dark current will improve the dynamic range due to a reduction of the shot noise of the dark current. Furthermore, dark current reduction is correlated with a decrease of the fixed pattern noise and a reduction of the amount of white pixels defects in dark. Therefore, the reduction of dark current has been an important subject in the history of solid-state imagers. The main part of the work that has been reported by our department about this subject is related to dark current reduction in CCDs [1]-[4]. Nowadays, we use this knowledge to improve the technology and pixel architecture of image sensors made in Philips' 0.35-m CMOS imaging process. To optimize the performance of an active CMOS image pixel, its architecture and photo diode structure have to be optimized [5]-[7].

Modelling of the CMOS buried double-junction photodetector

“…Here, g 11 , and so on) have been adopted as in [1][2][3][4][5][6][7][8][9][10]. The conductance is mainly influenced by dark and photo-generated G-R current components, as shown in Figure 7.…”

Differential integrator pixel architecture for dark current compensation in CMOS image sensors

“…The differential dark current compensation technique cannot effectively reduce the dark current due to different reverse bias voltage on photodiodes in each pixel which leads to nonuniformity in pixel array [3,4]. Previous work has shown the significant effect of varying the reverse bias voltage across the photodiode [5]. In [6] multiple-input multiple-output differential amplifier with negative feedback integrator is implemented.…”

Speckle Defect by Dark Leakage Current in Nitride Stringer at the Edge of Shallow Trench Isolation for CMOS Image Sensors

“…It is particularly important to control the leakage current, because of its effect on the image quality through the presence of dark noise in a CMOS image sensor (CIS). Various ideas have been suggested for reducing the dark leakage current related to the photodiode structure and pixel schemes [4]- [6]; however, these studies did not take into account the process variation of the STI step height, because the junction was located at a sufficient depth from the silicon (Si) surface. When the source and drain regions in a transistor each have a contact region with the STI, the STI step height has no significant effect, due to the high implantation energy and dopant dose; however, the STI step height in CIS devices may act as a source of leakage in the photodiodes, due to the nitride stringer size after the sidewall etching.…”