Lead Free Micro Bumping - Cost &amp;#x00026; Yield Challenges

Ruhmer, K.; Hughlett, E.; Ishizuka, Masaru; Kojima, T.; Asaka, Toru; Dang, Bing; Buchwalter, Stephen L.; Shih, Da‐Yuan

doi:10.1109/eptc.2007.4469694

Cited by 5 publications

(4 citation statements)

References 2 publications

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“…As described in Ruhmer, et al [1], there is a continuing trend of increasing input/output connection density between the semiconductor chip and the package or between two different ICs for electronic packaging and 3D integration. 150 µm pitch full grid solder bump arrays have already entered production for FlipChip packaging applications.…”

Section: Introductionmentioning

confidence: 95%

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Finite element analysis and neural network model for electronic hidden solder joint geometry prediction

Palomares

Hsieh

2010

SPIE Proceedings

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This paper investigates an active thermography approach to probing hidden solder joint geometry. Ten boards were fabricated with the same number of solder joints and amount of solder paste (0.061 g), but using three solder joint geometries (60°, 90°, and 120°). The 90° angle solder pin represented a normal joint, and the 60° and 120° angle pins represented abnormal solder joints. Each board was covered with another board that had three openings just big enough to allow the pin terminals to protrude. A semi-automated system was built to heat and then transfer each board set to a chamber where an infrared camera was used to scan the board as it was cooling down. Each board set underwent the heating, cooling, and scanning process for five trials. Two-thirds of the data set was used for model development and one-third for model evaluation. An artificial neural network (ANN) was constructed to predict abnormal joints given thermal data. Results suggest that solder joints with more surface area cool much faster than those with less surface area. A Finite Element Analysis (FEA) of the heating up and cooling down process consistently predicted solder geometry using the ANN with 86% accuracy. This approach can be used not only to inspect bad solder joints (i.e., low reliability) but also to mass screen for cold solder joints during BGA assembly, since the air gaps in cold solder joints may cause them to cool more slowly than normal joints.

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Section: Introductionmentioning

confidence: 95%

“…150 µm pitch full grid solder bump arrays have already entered production for FlipChip packaging applications. These fine pitch applications exceed the capabilities of traditional wafer bump inspection processes such as solder screening and ball placement [1]. New technology to address this problem is needed.…”

Section: Introductionmentioning

confidence: 98%

Finite element analysis and neural network model for electronic hidden solder joint geometry prediction

Palomares

Hsieh

2010

SPIE Proceedings

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“…The major manufacturing cost may be consumed by the fabrication of TSV, micro bumps with a fine pitch and the flip chip bonding process. Many researchers have been trying hard to solve these problems, especially bumping method [3][4]. Recently, the methods of electroplating and screen printing are dominantly used to form the bumps.…”

Section: Introductionmentioning

confidence: 99%

Solder Bump Maker with coining process on TSV chips for 3D packages

Sung

Choi

Lim

et al. 2010

2010 11th International Conference on Electronic Packaging Technology &Amp; High Density Packaging

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The electroplating and screen printing are widely used in the micro-electric industry but they have disadvantages of a complicated series of bumping process, equipments and materials. Furthermore, they are not suitable for the fine pitch bumping technology. To overcome these weak points, a maskless bumping technology using SBM has been developed. Solder Bump Masker (SBM) technology does not need any special equipment and mask tools. It is composed of solder powder and a resin. The solder is Sn58Bi and the resin is designed to have low viscosity for rheological characteristics of the solder droplets. In this paper, we optimized the bumping condition with controlling the process time. After bumping, the coining process, which the various loads were applied, has been investigated to get the bump with the extremely uniform heights. Finally, low-volume bumps with the excellent uniformity were successfully achieved.

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“…Solder bumping process using a mold has been recently announced for its advantages of good productivity and cost reduction [1][2][3][4][5][6][7]. Generally better results have been achieved when using photolithography for etch mask patterning, yet it is r Cavity highly costly and makes the process too complicated.…”

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confidence: 99%

Laser Assisted Solder Bump Mold Fabrication

Lim¹,

Jung²,

Park³

et al. 2008

2008 10th Electronics Packaging Technology Conference

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Sold bump mold fabrication using Excimer laser (KrF, 248 nm) source for patterning method is presented. The mold is designed to make reflowed solder bump with diameter of 115 a. Cleaning & Sputtering b. Laser patterning pm for 8inch wafer. We have developed CrOx / Cr binary metal masks which allow for obtaining circular cavities with diameter of 160,um, depth of 50,um and pitch of 300,um. We have obtained the characteristics of patterned etch mask with diameter of 60±3 ,um, pitch of 300±2 ,um by laser method. c. Glass etch d. Metal strip & Cleaning Cavities are performed with a dilute hydrofluoric acid (HF) CrOx/ Cr solution, having the diameter of 160±3 ,um, depths of 50±1 D Corning EAGLE2000 glass ptm. These results indicate that solder bump mold fabrication using laser method enables cavity formation with good e. Mold fill uniformity.

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Lead Free Micro Bumping - Cost & Yield Challenges

Cited by 5 publications

References 2 publications

Finite element analysis and neural network model for electronic hidden solder joint geometry prediction

Finite element analysis and neural network model for electronic hidden solder joint geometry prediction

Solder Bump Maker with coining process on TSV chips for 3D packages

Laser Assisted Solder Bump Mold Fabrication

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