2022 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) 2022
DOI: 10.1109/isvlsi54635.2022.00036
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LDTFI: Layout-aware Timing Fault-Injection Attack Assessment Against Differential Fault Analysis

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Cited by 8 publications
(4 citation statements)
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“…It is crucial to note that these security solutions are also at risk of probing-based attacks, which may lead to the leakage of sensitive information through the interposer layer. Moreover, remote attackers can introduce software-induced hardware fault injection attacks to make these security solutions inapplicable in mission-critical applications [47]. Furthermore, commercial Electronic Design Automation (EDA) tools predominantly focus on 2D monolithic SoC design or verification methodologies.…”
Section: State-of-the-art Security Assessment On Sipmentioning
confidence: 99%
See 1 more Smart Citation
“…It is crucial to note that these security solutions are also at risk of probing-based attacks, which may lead to the leakage of sensitive information through the interposer layer. Moreover, remote attackers can introduce software-induced hardware fault injection attacks to make these security solutions inapplicable in mission-critical applications [47]. Furthermore, commercial Electronic Design Automation (EDA) tools predominantly focus on 2D monolithic SoC design or verification methodologies.…”
Section: State-of-the-art Security Assessment On Sipmentioning
confidence: 99%
“…Among existing research studies for the identification and mitigation of FI, where sensors are used primarily to monitor changes in electrical parameters [108]- [112] in 2D ASIC designs [113], [114], there is a notable lack of countermeasures in the context of SiP. To address this shortcoming, we integrate a two-stage comprehensive framework into the CHSM to detect FI and tampering attempts within an SiP.…”
Section: F C5 Mitigation Against Fault Injectionmentioning
confidence: 99%
“…In practical experiments, various methods can be employed to inject faults [26][27][28][29][30][31][32][33][34], including variations in the operational voltage, clock, or temperature of the circuit, electromagnetic pulse interference with circuit operation, utilization of laser, UV-ray, X-ray, or focused ion beam (FIB), etc. In addition to this, the rest of the key recovery processes are all accomplished through computer computations.…”
Section: Experiments About Our Combined Analysis On Picomentioning
confidence: 99%
“…Timing Fault Injection [152,153]: Timing faults involve injecting errors related to timing and synchronization within the system. This technique aims to evaluate the system's behavior when faced with timing violations or synchronization failures.…”
mentioning
confidence: 99%