2019
DOI: 10.1109/tvt.2019.2892036
|View full text |Cite
|
Sign up to set email alerts
|

LDPC Code Design for Fading Interference Channels

Abstract: We focus on the two-user Gaussian interference channel (IC) with fading and study implementation of different encoding/decoding schemes with low-density parity-check (LDPC) codes for both quasi-static and fast fading scenarios. We adopt Han-Kobayashi encoding, derive stability conditions on the degree distributions of LDPC code ensembles, and obtain explicit and practical code designs. In order to estimate the decoding thresholds, a modified form of the extrinsic information transfer chart analysis based on bi… Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
1

Citation Types

0
2
0

Year Published

2020
2020
2022
2022

Publication Types

Select...
3
2

Relationship

0
5

Authors

Journals

citations
Cited by 5 publications
(2 citation statements)
references
References 18 publications
0
2
0
Order By: Relevance
“…The simulation and implementation results indicate that these improved variants of MSA can achieve a balance trade‐off between hardware complexity and decoding efficiency 82,83 . Furthermore, it will be an interesting task to explore the diverse extensions and abilities of these algorithms for various modulation schemes 84 and channel conditions 85 . The overall comparison of LDPC decoders for various wireless applications implemented in FPGA and ASIC technology over the years is summarized in Tables 4 and 5.…”
Section: Key Findingsmentioning
confidence: 99%
“…The simulation and implementation results indicate that these improved variants of MSA can achieve a balance trade‐off between hardware complexity and decoding efficiency 82,83 . Furthermore, it will be an interesting task to explore the diverse extensions and abilities of these algorithms for various modulation schemes 84 and channel conditions 85 . The overall comparison of LDPC decoders for various wireless applications implemented in FPGA and ASIC technology over the years is summarized in Tables 4 and 5.…”
Section: Key Findingsmentioning
confidence: 99%
“…We note that the performance of LDPC codes can be improved by optimizing the variable and check nodes degree distributions[44], however the degree optimization of the LDPC codes is out of the scope of this work.…”
mentioning
confidence: 99%