Laser Annealing of Amorphous Germanium on Silicon–Germanium Source/Drain for Strain and Performance Enhancement in pMOSFETs

Abstract

We report the first demonstration of a novel germanium-enrichment process for forming a silicon-germanium (SiGe) source/drain (S/D) stressor with a high Ge content. The process involves laser-induced local melting and intermixing of a Ge layer with an underlying Si 0.8 Ge 0.2 S/D region, leading to a graded SiGe S/D stressor with a significant increase in the peak Ge content. Various laser fluences were investigated for the laser annealing process. The process is then successfully integrated in a device fabrication flow, forming strained silicon-on-insulator p-channel field-effect transistors (p-FETs) with a high Ge content in SiGe S/D. A drive current enhancement of ∼12% was achieved with this process, as compared to a strained p-FET with Si 0.8 Ge 0.2 S/D p-FETs. The I Dsat enhancement, primarily attributed to strain-induced mobility improvement, is found to increase with decreasing gate lengths.Index Terms-Germanium (Ge) enrichment, laser annealing (LA), strained transistor.

Challenges of 22 nm and beyond CMOS technology

“…The FIN-FET with eΠ-SiGe S/D shows 26% higher driving current. A novel germanium-enrichment process to form high Ge content silicon-germanium (SiGe) source/drain (S/D) stressor is proposed [68] , which involves laser-induced local melting and intermixing of a Ge layer with an underlying Si 0.8 Ge 0.2 S/D region. A drive current enhancement of ∼12% can be achieved compared to a strained p-FET with Si 0.8 Ge 0.2 S/D p-FETs.…”

Undoped SiGe material calibration for numerical nanosecond laser annealing simulations

“…However, strain relaxation and defect formation may occur during the growth process and the strain is difficult to maintain especially for high Ge concentrations. In addition, UV-NLA is a very promising technique for 3D sequential integration due to the combination of a very short pulse duration (hundred of nanoseconds) and the limited UV light penetration in most of semiconductors used for CMOS integration [3][4]. These unique conditions make UV-NLA a good candidate for suppressing the propagation and growth of defects like dislocations.…”

Performance Benefits of Diamond-like Carbon Liner Stressor in Strained P-Channel Field-Effect Transistors With Silicon–Germanium Source and Drain

“…Such process-induced strain has been adopted in manufacturing to increase the mobility of carriers and drive current (I Dsat or I on ). To increase I on further, strain can be further increased through adoption of multiple stressors [4], [5], e.g., combining the silicon-germanium (SiGe) source-and-drain (S/D) stressor and the SiN liner stressor, or by raising the Ge concentration in SiGe S/D [6], [7]. To enhance strain effects due to the SiN liner stressor, a thicker SiN film can be used, or further process tuning can be done to increase the intrinsic stress of SiN.…”