Large-scale parallel arrays of silicon nanowires via block copolymer directed self-assembly

Abstract

Extending the resolution and spatial proximity of lithographic patterning below critical dimensions of 20 nm remains a key challenge with very-large-scale integration, especially if the persistent scaling of silicon electronic devices is sustained. One approach, which relies upon the directed self-assembly of block copolymers by chemical-epitaxy, is capable of achieving high density 1 : 1 patterning with critical dimensions approaching 5 nm. Herein, we outline an integration-favourable strategy for fabricating high areal density arrays of aligned silicon nanowires by directed self-assembly of a PS-b-PMMA block copolymer nanopatterns with a L(0) (pitch) of 42 nm, on chemically pre-patterned surfaces. Parallel arrays (5 × 10(6) wires per cm) of uni-directional and isolated silicon nanowires on insulator substrates with critical dimension ranging from 15 to 19 nm were fabricated by using precision plasma etch processes; with each stage monitored by electron microscopy. This step-by-step approach provides detailed information on interfacial oxide formation at the device silicon layer, the polystyrene profile during plasma etching, final critical dimension uniformity and line edge roughness variation nanowire during processing. The resulting silicon-nanowire array devices exhibit Schottky-type behaviour and a clear field-effect. The measured values for resistivity and specific contact resistance were ((2.6 ± 1.2) × 10(5)Ωcm) and ((240 ± 80) Ωcm(2)) respectively. These values are typical for intrinsic (un-doped) silicon when contacted by high work function metal albeit counterintuitive as the resistivity of the starting wafer (∼10 Ωcm) is 4 orders of magnitude lower. In essence, the nanowires are so small and consist of so few atoms, that statistically, at the original doping level each nanowire contains less than a single dopant atom and consequently exhibits the electrical behaviour of the un-doped host material. Moreover this indicates that the processing successfully avoided unintentional doping. Therefore our approach permits tuning of the device steps to contact the nanowires functionality through careful selection of the initial bulk starting material and/or by means of post processing steps e.g. thermal annealing of metal contacts to produce high performance devices. We envision that such a controllable process, combined with the precision patterning of the aligned block copolymer nanopatterns, could prolong the scaling of nanoelectronics and potentially enable the fabrication of dense, parallel arrays of multi-gate field effect transistors.

Robust Superhydrophobicity in Large‐Area Nanostructured Surfaces Defined by Block‐Copolymer Self Assembly

“…Block-copolymer thin fi lms have found good application as non-lithographic patterning materials for fabricating magnetic nanostructures, [29][30][31] optical elements, [ 32,33 ] membranes, [ 28,[34][35][36] and microelectronic device structures. [ 27,37 ] Our process begins by spin-casting a polystyrene-block -poly(methyl methacrylate) (PS-b -PMMA) block-copolymer thin fi lm onto a fl at silicon surface (1 wt% PSb -PMMA in toluene, spun at 3000 rpm). Thermally annealing the sample (12 h, 200 °C in vacuum) facilitates block-copolymer self assembly via microphase separation, resulting in spontaneous formation of a fi lm composed of uniform diameter PMMA cylindrical domains locally arranged in a close-packed hexagonal lattice ( Figure 1 a-c).…”

Stability of frozen waves in the modified Cahn-Hilliard model

“…Under the weakly nonlinear approximation, in turn, one should expect the wavelength to be close, but not necessarily equal, to one of the above two values, with a deviation from them proportional to some degree of the wave's amplitude ε. Solutions similar to (10) are the ones computed in Ref. [11]; they will be referred to as 'one-wave solutions'.…”

“…In its simplest form, conventional lithographic techniques are used to create trenches in a silicon wafer -then the trenches are filled with block copolymer which orders into lamellae parallel to the sidewall on annealing [8]. Finally a selected monomer is chemically etched away and the remaining polymer used as an etch mask to facilitate pattern transfer to the substrate, creating nanowires on a scale too fine to be manufactured by conventional techniques [9,10].…”

Electrochemical sensing based on nanopatterned functional surfaces

“…Figure 2(B) depicts the type of pattern transfer used for integrated circuit manufacture where the polymer pattern is copied to a substrate. 6 Briefly, one block is selectively removed to yield a topographical etch mask that then protects the substrate during an etch process. Figure 2(C) shows a classic templatetype reaction where material is deposited into the topography.…”