Kuijk Bandgap Voltage Reference With High Immunity to EMI

Redouté, Jean-Michel; Steyaert, Michiel

doi:10.1109/tcsii.2009.2037991

Cited by 24 publications

(10 citation statements)

References 11 publications

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“…However, the required supply voltage will increase, which is not suitable for low-voltage-reference design. The PSNA at high frequencies can be improved by adding a filtering capacitor at the reference output [4], [8], [19], [22], [27], [34], [35]. Table II summarizes a brief comparison on the results of proposed BGR and the other voltage references reported in literature to show the improvements from the proposed structure.…”

Section: Resultsmentioning

confidence: 99%

A 1.6-V 25-$\mu$A 5-ppm/$^{\circ}$C Curvature-Compensated Bandgap Reference

Zhou

Shi

Zhi

et al. 2012

IEEE Trans. Circuits Syst. I

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A high precision high-order curvature-compensated bandgap reference (BGR) compatible with standard BiCMOS process is presented in this paper that is capable of working down to input voltages of 1.6 V with 1.285 V output voltage. High-order curvature correction for this reference is accomplished by a novel piecewise technique, which realizes exponential curvature compensation in temperature range, and a logarithmic compensation term proportional to in higher temperature range through simple structures. Experimental results of the proposed BGR implemented in 0.5-m BiCMOS process demonstrate that a temperature coefficient (TC) of 5 ppm/ C is realized at 3.6 V power supply, a power-supply noise attenuation (PSNA) of 70 dB is achieved without filtering capacitors, and the line regulation is better than 0.47 mV/V from 1.6 V to 5 V supply voltage while dissipating a maximum supply current of 25 A. The active area of the presented BGR is 180 m 220 m.

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Section: Resultsmentioning

confidence: 99%

A 1.6-V 25-$\mu$A 5-ppm/$^{\circ}$C Curvature-Compensated Bandgap Reference

Zhou

Shi

Zhi

et al. 2012

IEEE Trans. Circuits Syst. I

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“…The proposed VR obtains outstanding low values of -0.17 % and 822 µV pp for the DC shift and peak-to-peak ripple, respectively. Table II shows the comparison between our voltage reference and the works of [3] and [2]. A reduction of 10x and 44x in relation to [3]; and 12x and 91x in relation to [2] for the maximum DC shift and peak-to-peak ripple, respectively.…”

Section: Simulation Resultsmentioning

confidence: 99%

“…Table II shows the comparison between our voltage reference and the works of [3] and [2]. A reduction of 10x and 44x in relation to [3]; and 12x and 91x in relation to [2] for the maximum DC shift and peak-to-peak ripple, respectively. Our voltage reference attains a better peak-topeak ripple and DC shift for the same EMI source (4 dBm), while consuming much less power.…”

Section: Simulation Resultsmentioning

confidence: 99%

“…Often, no consideration regarding EMI is taken into account during its design, even if it is known that EMI can strongly degrade its normal operation. The effect of a strong EMI injection in the power supply for different bandgap voltage references was presented in [2]. Moreover, in newer technologies nodes, for which the power supply voltage is being progressively reduced, the need of low-voltage highprecision references with high immunity to EMI is a major concern.…”

Section: Introductionmentioning

confidence: 99%

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A 90 dB PSRR, 4 dBm EMI resistant MOSFET-Only Voltage Reference

Cordova

Toledo

Klimach

et al. 2016

2016 IEEE 7th Latin American Symposium on Circuits &Amp; Systems (LASCAS)

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Electromagnetic Interference (EMI) degrades the performance of voltage and current references, due to its finite Power Supply Rejection Ratio (PSRR). The design of a 90 dB PSRR, 4 dBm EMI resistant MOSFET-Only Voltage Reference is herein presented. The Voltage Reference is designed based on the Zero Temperature Coefficient (ZTC) transistor point. The high-PSRR is obtained using zero-VT transistors as active loads in the open and feedback loop of the circuit. The final circuit was designed in a 130 nm CMOS process and occupies around 0.014 mm 2 of silicon area while consuming just 1.15 µW . Postlayout simulations present a 206 mV of Voltage Reference with a Temperature Coefficient of 321 ppm/ o C, for the temperature range from -55 to 125 o C. An EMI source of 4 dBm (1 Vpp) injected in the power supply , according to the Direct Power Injection (DPI) standard, yield in a maximum DC Shift and Peak-to-Peak ripple of -0.17 % and 822 µVpp, respectively.

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“…The power-supply noise attenuation (PSNA) [21] represents the anti-interference ability of the output to supply disturbances, such as crosstalk, noise, and so on. Therefore, the higher the PSNA is, the better the performance of reference is.…”

Section: A Linear Voltage Associated With Threshold Voltagementioning

confidence: 99%

A CMOS Voltage Reference Based on Mutual Compensation of Vtn and Vtp

Zhou

Zhu

Shi

et al. 2012

IEEE Trans. Circuits Syst. II

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A novel temperature-stable nonbandgap voltage reference, which is compatible with standard CMOS technology, is presented in this brief. No diodes or parasitic bipolar transistors are used. Based on mutual temperature compensation of the threshold voltages of nMOS and pMOS transistors, a temperature-insensitive voltage reference with significant reduction in temperature dependence of mobility is achieved without using subthreshold characteristics. The problem of a fixed voltage reference value is also avoided by different parameter design. Experimental results of the proposed voltage reference implemented with a 0.35-μm CMOS process demonstrate that the output of the voltage reference is 847.5 mV, a temperature coefficient of 11.8 ppm/ • C with a temperature range from 0 • C to 130 • C is obtained at 3-V power supply, a power-supply noise attenuation of 72 dB is achieved without any filtering capacitor, and the line regulation is better than 0.185 mV/V from 1.8-V to 4.5-V supply voltage dissipating a maximum supply current of 8 μA. The active area of the presented voltage reference is 90 μm × 120 μm.Index Terms-CMOS voltage reference, nonbandgap voltage reference, power-supply noise attenuation (PSNA) without filtering capacitor, temperature coefficient (TC), temperature compensation.

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Kuijk Bandgap Voltage Reference With High Immunity to EMI

Cited by 24 publications

References 11 publications

A 1.6-V 25-$\mu$A 5-ppm/$^{\circ}$C Curvature-Compensated Bandgap Reference

A 1.6-V 25-$\mu$A 5-ppm/$^{\circ}$C Curvature-Compensated Bandgap Reference

A 90 dB PSRR, 4 dBm EMI resistant MOSFET-Only Voltage Reference

A CMOS Voltage Reference Based on Mutual Compensation of Vtn and Vtp

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