Kogge Stone Adder with GDI technique in 130nm technology for high performance DSP applications

Penumutchi, Bujjibabu; Vella, Satyanarayana; Satti, Harichandraprasad

doi:10.1109/smarttechcon.2017.8358334

Cited by 8 publications

(1 citation statement)

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“…[24] Compared the performance of CMOS and GDI logic styles. [25] Designed 64-bit Kogge stone adder and simulated using Mentor graphics EDA tool in 130nm technological node. Due to less fan-out and minimum logic depth Kogge stone adder designed using GDI technique has higher throughput.…”

Section: Related Workmentioning

confidence: 99%

Design and Analysis of Braun Multiplier Using CMOS/GDI Technique for Signal Processing

2020

IJETER

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Efficient arithmetic circuits are needed for cost effective and computation intense signal processing applications. Electronic appliances such as pagers, notebook computers and laptops demands high reliable and portable circuits. With the advent of high performance chips, power dissipation has gained its importance for efficient chip design. The need to explore efficient design techniques has increased to achieve high throughput and reduced power dissipation. Addition is an obligatory and crucial arithmetic operation used in application specific and general purpose systems. This paper discusses the design of efficient adder and its implementation in Braun multiplier using different logic styles like Gate Diffusion Input (GDI) logic and Complementary Metal Oxide Semiconductor (CMOS). The design is implemented in Cadence Virtuoso tool for 45 nm technological node. The GDI logic style reduces the delay of Braun multiplier by 42.38% with power optimization compared with CMOS logic style.

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Section: Related Workmentioning

confidence: 99%