An optimal network-on-chip (NoC) topology, hierarchical star topology, that uses the star graphs as building blocks is presented for high-performance systemon-chip (SoC) Design. Its topological properties are compared with the topologies in the same category in terms of various performance metrics including diameter, cost, fault tolerance, fault diameter etc. It has been shown that the hierarchical star topology is an optimal NoC topology. Simultaneously, popular and interesting topologies are compared in practical terms of energy consumption and area cost. Considering the energy and area cost together, the hierarchical star topology is the most energy-efficient and cost-effective topology.