ESSDERC 2007 - 37th European Solid State Device Research Conference 2007
DOI: 10.1109/essderc.2007.4430885
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Key directions and a roadmap for electrical design for manufacturability

Abstract: CMP fills are inserted to make metal density uniform and hence reduce post-polish height variations. Classical methods to insert fills focus on metal density uniformity, but do not take into consideration or are unable to minimize the impact of fills on circuit performance. In this paper, we develop a fill insertion method that heuristically minimizes coupling capacitance increase due to fill. Our optimization methodology builds on fill insertion guidelines previously developed in, e.g., [12] and [1]. Experime… Show more

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Cited by 12 publications
(4 citation statements)
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“…The operating principle of POFETs is quite similar to MOSFETs, except that the channel in POFETs is formed by the accumulation of charge carriers at the insulator/semiconductor (I/S) interface, whereas, the channel in MOSFETs is formed by the depletion of charge carriers. [ 14 ] A POFET operates as a voltage‐controlled current source, wherein the application of a bias between the gate and source electrodes ( V GS ) results in the accumulation of a sheet of mobile charge carriers near the I/S interface that allows current flow through the active layer upon applying a suitable bias between the source and drain electrodes ( V DS ). The current in the channel between the source and drain electrodes is known as the drain current, I D .…”
Section: Organic Field‐effect Transistorsmentioning
confidence: 99%
See 1 more Smart Citation
“…The operating principle of POFETs is quite similar to MOSFETs, except that the channel in POFETs is formed by the accumulation of charge carriers at the insulator/semiconductor (I/S) interface, whereas, the channel in MOSFETs is formed by the depletion of charge carriers. [ 14 ] A POFET operates as a voltage‐controlled current source, wherein the application of a bias between the gate and source electrodes ( V GS ) results in the accumulation of a sheet of mobile charge carriers near the I/S interface that allows current flow through the active layer upon applying a suitable bias between the source and drain electrodes ( V DS ). The current in the channel between the source and drain electrodes is known as the drain current, I D .…”
Section: Organic Field‐effect Transistorsmentioning
confidence: 99%
“…The idea of a FET was initially proposed by Lilienfield in 1930, [ 13 ] while the first report on metal–oxide–semiconductor FET (MOSFET) was published by Kahng and Atalla in 1960. [ 14 ] MOSFET forms the backbone of virtually all mobile communication chips, solid‐state memories (NAND Flash, dynamic random access memory, among others), active‐matrix displays, microprocessors, and graphics adapters in the mainstream semiconductor industry, and numerous other electronic applications. Later, this concept was extended to hydrogenated‐amorphous‐silicon (a‐Si:H)‐based thin‐film transistors (TFTs), [ 15 ] which are presently widely employed as the pixel drive devices in active‐matrix liquid‐crystal displays on glass substrates.…”
Section: Introductionmentioning
confidence: 99%
“…[ 16 ] Compared with MESFET, the representative insulated gate FET, using a metal with an insulated layer (such as SiO 2 ) below to fabricate the gate, was initially invented by Mohamed M. Atalla and Dawan Kahng at Bell Lab in 1960 to solve the problem of “surface state” which can be reduced by a sandwich structure of metal (M)‐oxide (O)‐semiconductor (S), namely the widely known MOS structure. [ 17 ] However, because this early MOSFET worked slowly and damaged easily, until a few years later, its value as signal transducer with advantages of low cost, easy fabrication, and easy integrated in large‐scale circuit was finally realized. [ 18 ] Considering the maturity of MOSFET technology, Piet Bergveld from Dutch retained the structure of MOSFET transducer and further developed the ion‐sensing application.…”
Section: Introductionmentioning
confidence: 99%
“…It should be noted that these parameters are affected by process variation. Especially etching and lithography processes have a great influence on line width variation [17], [18]. Additional process might be required to eliminate the impact of process variation if the impact is not negligible.…”
Section: Error Analysis and Parameter Extraction Stagesmentioning
confidence: 99%