Junctionless-FET fabrication using NH&lt;inf&gt;4&lt;/inf&gt; OH solution wet etching for silicon channel thinning

Stucchi-Zucchi, Lucas; Silva, Audrey R.; Diniz, J. A.; Espindola, Luana; Vaz, Alfredo R.; Cloidin, Frederico

doi:10.1109/sbmicro.2018.8511382

Cited by 2 publications

(2 citation statements)

References 10 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Stucchi-Zucchi et al [23] showed a nanosheet based approach to the fabrication of JLFETs possible even on micrometer scale lithography. The devices were fabricated on 340 nm Si over 400 nm SiO 2 SOI wafers.…”

Section: B Jlfets Using Anisotropic Silicon Etchingmentioning

confidence: 99%

Silicon Nanowire Technologies: brief review, home-made solutions and future trends

Stucchi-Zucchi

Santos

Rufino

et al. 2022

JICS

View full text Add to dashboard Cite

The silicon nanowire (SiNW) is poised to become an industry standard on the upcoming technological nodes. It presents improved current drive and modulation, minimized footprint, stackability, and a host of different beneficial characteristics. The last few years of research have focused on solving the last remaining challenges of SiNW fabrication as they roll into commercial usage. Now, novel devices, as well as channel and device stacking for 3D VLSI applications is being studied. As well as how can the SiNW geometry can be harnessed for More Than Moore materials and applications. In this review, we present a sample of the range of devices, techniques and applications of SiNW structures, alongside novel developments in the research carried out at University of Campinas. Demonstrations of JLFETs fabricated using Ga+-FIB, e-beam lithography, silicon etching in NH4OH solution, FinFETs fabricated using Ga+ lithography and strained silicon structures are shown. Promising future developments in VLSI and More Than Moore applications such as vertically stacked nanowire geometries, graphene nanoribbon devices, and MagFETs are also presented.

show abstract

Section: B Jlfets Using Anisotropic Silicon Etchingmentioning

confidence: 99%

Silicon Nanowire Technologies: brief review, home-made solutions and future trends

Stucchi-Zucchi

Santos

Rufino

et al. 2022

JICS

View full text Add to dashboard Cite

show abstract

“…As SEM relays precise topographic information of the materials, it is important on surface roughness and structural characterizations. When paired with cross-section imaging, SEM can also show layer- -ZUCCHI et al, 2018)…”

Section: Lateral Etching In Nh4oh Solutionmentioning

confidence: 99%

Significados de velhice bem-sucedida segundo idosos

Stucchi-Zucchi¹

View full text Add to dashboard Cite

show abstract

Junctionless-FET fabrication using NH<inf>4</inf> OH solution wet etching for silicon channel thinning

Cited by 2 publications

References 10 publications

Silicon Nanowire Technologies: brief review, home-made solutions and future trends

Silicon Nanowire Technologies: brief review, home-made solutions and future trends

Significados de velhice bem-sucedida segundo idosos

Contact Info

Product

Resources

About