2015
DOI: 10.1109/tasc.2014.2377744
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Junction Yield Analysis for 10 V Programmable Josephson Voltage Standard Devices

Abstract: Analysis of the Josephson junction yield in the National Institute of Standards and Technology 10 V Programmable Josephson Voltage Standard (PJVS) has been performed by fabricating and measuring over 25 million Nb/Nb x Si 1−x /Nb junctions. Using the 265 116 junctions per PJVS device, it was possible to measure Shapiro steps on current voltage curves and then estimate the number of single-junction defects within these long arrays. By comparing the results of a quantum-based measurement to a model simulating ju… Show more

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Cited by 28 publications
(10 citation statements)
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“…Capitalizing on pulse-area quantization enables the use of JJ arrays to construct exceptionally stable and repeatable voltage sources from dc to a few gigahertz [ 13 16 ]. Similar devices are used to realize intrinsically accurate voltages for the international system of units and are disseminated worldwide as primary dc and ac voltage standards [ 17 , 18 ]. Furthermore, the use of SFQ pulses has been proposed as a scalable paradigm for digitally controlling qubits [ 19 21 ] and has recently been demonstrated with a SFQ driver and qubit circuit cofabricated on the same chip [ 22 ].…”
Section: Introductionmentioning
confidence: 99%
“…Capitalizing on pulse-area quantization enables the use of JJ arrays to construct exceptionally stable and repeatable voltage sources from dc to a few gigahertz [ 13 16 ]. Similar devices are used to realize intrinsically accurate voltages for the international system of units and are disseminated worldwide as primary dc and ac voltage standards [ 17 , 18 ]. Furthermore, the use of SFQ pulses has been proposed as a scalable paradigm for digitally controlling qubits [ 19 21 ] and has recently been demonstrated with a SFQ driver and qubit circuit cofabricated on the same chip [ 22 ].…”
Section: Introductionmentioning
confidence: 99%
“…The individual JJs have an area of 56 μm 2 and an average junction resistance of 4 mΩ. A detailed description of the fabrication is presented elsewhere [14]–[16]. …”
Section: Advances In On-chip Circuitsmentioning
confidence: 99%
“…To reduce the temperature sensitivity of the JPG we have departed from the superconductor-normal metalsuperconductor (SNS) JJ technology [61] based on triple-stacked self-shunted niobium-doped-silicon barriers (NbSi) embedded in the center conductor of a niobium (Nb) superconducting coplanar waveguide. Instead, we form the JPG array from externally shunted superconductor-insulator-superconductor (SIS) junctions, as can be seen in Fig.…”
Section: Digital Qubit Control Fidelity Limitsmentioning
confidence: 99%