JTAG Security System Based on Credentials

Park, Keun‐Young; Yoo, Sang Guun; Kim, Taejun; Kim, Juho

doi:10.1007/s10836-010-5170-y

Cited by 24 publications

(23 citation statements)

References 10 publications

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“…An elaborate three-party secure JTAG protocol using certificates involving SHA-1 hash algorithm, AES block cipher and several arithmetic operators is presented in [12]. The authors describe the possible attack cases, but the protocol is not proven to be secure.…”

Section: Previous Workmentioning

confidence: 99%

“…Hence, as shown in the table, we require for design I a total of 46716 GEs and 47050 GEs for Design II to implement the secure JTAG Scheme with the Schnorr and ECDSA controllers. We choose the solution described in [12] for having an estimative of area overhead of our approach. The cost of that solution is 25k gates.…”

Section: Area Overheadmentioning

confidence: 99%

“…The cost of that solution is 25k gates. It means that our solution is around twice larger than the solution in [12]. Our solution is based on public-key cryptography, which inherently demands more hardware resources than symmetric-key based approaches.…”

Section: Area Overheadmentioning

confidence: 99%

“…Our solution is based on public-key cryptography, which inherently demands more hardware resources than symmetric-key based approaches. Also, the area calculations in [12] do not consider the overhead of the Hash function implementation. It must be also noted that all authentication schemes including the one proposed in this paper require Non-volatile memory is for storing cryptographic keys.…”

Section: Area Overheadmentioning

confidence: 99%

“…Though there are several approaches for securing the JTAG interface, which can be found in the literature [8,9,10,11,12], most of them are based on symmetric-key approaches. They have an inherent key management problem.…”

Section: Introductionmentioning

confidence: 99%

See 4 more Smart Citations

Secure JTAG Implementation Using Schnorr Protocol

et al. 2013

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Abstract.The standard IEEE 1149.1 (Test Access Port and Boundary-Scan Architecture, also known as JTAG port) provides a useful interface for embedded systems development, debug, and test. In an 1149.1-compatible integrated circuit, the JTAG port allows the circuit to be easily accessed from the external world, and even to control and observe the internal scan chains of the circuit. However, the JTAG port can be also exploited by attackers to mount several cryptographic attacks. In this paper we propose a novel architecture that implements a secure JTAG interface. Our JTAG scheme allows for mutual authentication between the device and the tester. In contrast to previous work, our scheme uses provably secure asymmetric-key based authentication and verification protocols. The complete scheme is implemented in hardware and integrated with the standard JTAG interface. Detailed area and timing results are also presented.

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Section: Previous Workmentioning

confidence: 99%

Section: Area Overheadmentioning

confidence: 99%

Section: Area Overheadmentioning

confidence: 99%

Section: Area Overheadmentioning

confidence: 99%