JHDL - An HDL for Reconfigurable Systems

Abstract

JHDL is a design tool for reconfigurable systems that allows designers to express circuit organizations that dynamically change over time in a natural way, using only standard programming abstractions found in objectoriented languages. JHDL manages FPGA resources in a manner that is similar to the way object-oriented languages manage memory: circuits are treated as distinct objects and a circuit is configured onto a configurable computing machine (CCM) by invoking its constructor, effectively "constructing" an instance of the circuit onto the reconfigurable platform just as object instances are allocated in memory with conventional object-oriented languages. This approach of using object constructors/destructors to control the circuit lifetime on a CCM is a powerful technique that naturally leads to a dual simulation/execution environment where a designer can easily switch between either software simulation or hardware execution on a CCM with a single application description. Moreover, JHDL supports dual hardware/software execution; parts of the application described using JHDL circuit constructs can be executed on the CCM while the remainder of the application-the GUI for example-can run on the CCM host. Based on an existing programming language (Java), JHDL requires no language extensions and can be used with any standard Java 1.1 distribution.

Design, Debug, Deploy: The Creation of Configurable Computing Applications

“…As a concrete instantiation of an open CAD framework the JHDL system [11,12] was created. The term JHDL can be used to refer both to the JHDL circuit design language itself as well as to the associated JHDL open CAD framework.…”

A programmable array processor architecture for flexible approximate string matching algorithms

“…Firstly, we have synthesized the PE design in JHDL [3]. The JHDL is a complete structural design environment, including debugging, netlisting and other design aids.…”

Run-Time Reconfigurable Systems for Digital Signal Processing Applications: A Survey

“…Therefore the verification of a run-time reconfigurable system is difficult since the designer must evaluate the system on actual hardware. One design tool that considers simulation of run-time reconfigurable systems is JHDL [59,60]. JHDL is a design tool that allows simulation of a runtime reconfigurable design without implementing it on actual hardware.…”