Java signal processing: FFTs with bytecodes

Glossner, CJ; Thilo, Jesse; Vassiliadis, S.

doi:10.1002/(sici)1096-9128(199809/11)10:11/13<1173::aid-cpe403>3.0.co;2-1

Cited by 6 publications

(3 citation statements)

References 5 publications

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“…Hewlett Packard has a similar system [39]. Using the Toba compiler, performance improvements nearly twice a standard interpreter have been reported for FFT signal processing functions [40,41]. The Toba group found performance improvements of 2 to 10 times versus a standard interpreter [38].…”

Section: Off-line Compilationmentioning

confidence: 99%

Embedded Processor Design Challenges

Deprettere¹,

Teich²,

Vassiliadis³

2002

Lecture Notes in Computer Science

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PrefaceThis textbook is intended to give an introduction to and an overview of stateof-the-art techniques in the design of complex embedded systems.The book title is SAMOS for two major reasons. First, it tries to focus on the actual distinct, yet important problem fields of System-Level design of embedded systems, including mapping techniques and synthesis, Architectural design, Modeling issues such as specification languages, formal models, and finally Simulation.The second reason is that the volume includes a number of papers presented at a workshop with the same name on the Island of Samos, Greece, in July 2001.In order to receive international attention, a number of reputed researchers were invited to this workshop to present their current work. Participation was by invitation only. For the volume presented here, a number of additional papers where selected based on a call for papers. All contributions were refereed. This volume presents a selection of 18 of the refereed papers, including 2 invited papers.The textbook is organized according to four topics: The first is A) System-Level Design and Simulation. In this section, we present a collection of papers that give an overview of the challenging goal to design and explore alternatives of embedded system implementations at the system-level. One paper gives an overview of models and tools used in system-level design. The other papers present new models to describe applications, provide models for refinement and design space exploration, and for tradeoff analysis between cost and flexibility of an implementation.Section B) Compiler and Mapping Technology presents new techniques to exploit parallelism in future embedded systems, i.e., by mapping computation intensive applications to hardware. The papers presented include new theoretical results for scheduling loop-like programs with subprogram structure, for partitioning programs with affine data dependences, and for mapping and simulating programs as a network of Kahn-processes.Topic C) Embedded Processors and Architectures is related to novel processor and architecture principles for future embedded systems. One paper gives an overview of architectures for multimedia applications and presents future trends in this direction. Two papers deal with the possibility of hardware reconfiguration as a means to adapt the processor to a certain application or domain: One gives an overview of current development in microcoded reconfigurable processors, the other deals with architecture adaptions in order to obtain energy efficient wireless image computations. A final paper is dedicated to caches.Finally, Topic D) Applications presents some interesting applications of embedded computing systems including the design of a run-time reconfigurable Web-camera.

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Section: Off-line Compilationmentioning

confidence: 99%

Embedded Processor Design Challenges

Deprettere¹,

Teich²,

Vassiliadis³

2002

Lecture Notes in Computer Science

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“…The first workload, WLl, creates many objects and has a high percent of dynamic instructions which access the Link Translation Buffer. An example of this type of program is object-oriented Tensor Fast Fourier Transforms (FFTs) [4].…”

Section: Workload Characterizationmentioning

confidence: 99%

“…This is intended to simulate code which may have been ported from C. An example of this type of program is the Press FFTs [4]. A key feature of this type of code is the lack of method invocation and the use of s t a t i c (e.g.…”

Section: Workload Characterizationmentioning

confidence: 99%

Delft-Java link translation buffer

Glossner¹,

Vassiliadis

Proceedings. 24th EUROMICRO Conference (Cat. No.98EX204)

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We describe the hardware support in the DELFT-JAVA processor which enables e8cient dynamic linking of JAVA programs. The proposed mechanism supports method invocation of dynamically linked classes through the use of a Link Translation Buffer (LTB). Since our Instruction Set Architecture directly supports dynamically linked method invocation, the Link Translation Buffer is architecturally transparent to the executing program. The operation of the LTB is described and preliminary performance results are reported. Method invocation differences between the C+ + programming language and the JAVA programming language are outlined. Preliminary performance results for the Link Translation Buffer suggest that program performance may improve from 1 . l x to 1 . 5~ when a suitable LTB is used to cache frequently utilized methods.

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On the conditions necessary for removing abstraction penalties in OOLALA

Luján

Freeman

Gurd

2005

Concurrency and Computation

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SUMMARYOOLALA is an object-oriented linear algebra library designed to reduce the effort of software development and maintenance. In contrast with traditional (Fortran-based) libraries, it provides two high abstraction levels that significantly reduce the number of implementations necessary for particular linear algebra operations. Initial performance evaluations of a Java implementation of OOLALA show that the two high abstraction levels are not competitive with the low abstraction level of traditional libraries. These initial performance results motivate the present contribution-the characterization of a set of storage formats (data structures) and matrix properties (special features) for which implementations at the two high abstraction levels can be transformed into implementations at the low (more efficient) abstraction level.

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Java signal processing: FFTs with bytecodes

Cited by 6 publications

References 5 publications

Embedded Processor Design Challenges

Embedded Processor Design Challenges

Delft-Java link translation buffer

On the conditions necessary for removing abstraction penalties in OOLALA

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