ISPSD `07 Best Paper Award; Record-Low On-Resistance for 0.35 μm based Integrated XTREMOS<sup>TM</sup> Transistors

Moens, P.; Bauwens, F.; Desoete, B.; Baele, J.; Vershinin, K.; Ziad, H.; Narayanan, E.M. Sankara; Tack, M.

doi:10.1109/ispsd.2008.4538878

Cited by 2 publications

(1 citation statement)

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“…[2][3][4][5][6][7][8][9][10][11][12][13][14][15] In addition, mobility enhancement by mechanical stress has been demonstrated to reduce the on-resistance in the FP power MOSFET. [16][17][18][19] Although the design for R on A reduction has been studied, 20) it is not clear whether the same design direction improves the FOM including the switching characteristics and the design parameter optimization has a potential for further FOM improvement. Q sw is mainly for the gate-drain capacitance C gd charging and proportional to the switching loss.…”

Section: Introductionmentioning

confidence: 99%

A design direction of low-voltage field-plate power MOSFETs for figure-of-merit (FOM) limit

Ogawa¹,

Saito²,

Nishizawa³

2021

Jpn. J. Appl. Phys.

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The design direction of low voltage field-plate (FP) power MOSFETs was studied toward the figure-of-merit (FOM) limit by TCAD simulation. The FOMs of R on Q g, R on Q sw, and R on Q oss are considering the on-resistance and the charge required for the switching to evaluate the conduction loss and the switching loss. The results show that thin oxide and narrow mesa structure is desired for minimizing on-resistance R on A and opposite design of thick oxide and wide mesa structure is a good choice to reduce R on Q sw for high switching frequency application. In addition, the potential of R on A and R on Q sw reduction is maintained, however, it is difficult to reduce the R on Q g and R on Q oss by the design parameter optimization. It is verified that power loss reduction in whole operating condition cannot be achieved only by the design parameter optimization and requires approach from the other direction.

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Section: Introductionmentioning

confidence: 99%

A design direction of low-voltage field-plate power MOSFETs for figure-of-merit (FOM) limit

Ogawa¹,

Saito²,

Nishizawa³

2021

Jpn. J. Appl. Phys.

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Lateral Power Transistors with Trench Patterns

Erlbacher

2014

Power Systems

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ISPSD `07 Best Paper Award; Record-Low On-Resistance for 0.35 μm based Integrated XTREMOS^TM Transistors

Cited by 2 publications

References 0 publications

A design direction of low-voltage field-plate power MOSFETs for figure-of-merit (FOM) limit

A design direction of low-voltage field-plate power MOSFETs for figure-of-merit (FOM) limit

Lateral Power Transistors with Trench Patterns

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ISPSD `07 Best Paper Award; Record-Low On-Resistance for 0.35 μm based Integrated XTREMOSTM Transistors

Cited by 2 publications

References 0 publications

A design direction of low-voltage field-plate power MOSFETs for figure-of-merit (FOM) limit

A design direction of low-voltage field-plate power MOSFETs for figure-of-merit (FOM) limit

Lateral Power Transistors with Trench Patterns

Contact Info

Product

Resources

About

ISPSD `07 Best Paper Award; Record-Low On-Resistance for 0.35 μm based Integrated XTREMOS^TM Transistors