iProver-Eq: An Instantiation-Based Theorem Prover with Equality

2013

Programming Logics

Self Cite

Abstract. Inst-Gen is an instantiation-based reasoning method for first-order logic introduced in [18]. One of the distinctive features of Inst-Gen is a modular combination of first-order reasoning with efficient ground reasoning. Thus, Inst-Gen provides a framework for utilising efficient off-the-shelf propositional SAT and SMT solvers as part of general first-order reasoning. In this paper we present a unified view on the developments of the Inst-Gen method: (i) completeness proofs; (ii) abstract and concrete criteria for redundancy elimination, including dismatching constraints and global subsumption; (iii) implementation details and evaluation.

Section: Discussionmentioning

confidence: 99%

Section: Implementation Of Inst-gen In Iprovermentioning

confidence: 99%

Inst-Gen – A Modular Approach to Instantiation-Based Automated Reasoning

2013

Programming Logics

Self Cite

“…One possible explanation can be that flattening can still be beneficial in some cases due to axiomatic treatment of equality in iProver. We expect that this can be amended by using iProver-Eq [21] which integrates equality using superposition-based reasoning. Another explanation can be that in some cases searching for minimal models can still be quicker.…”

Section: Implementation and Evaluationmentioning

confidence: 99%

Non-cyclic Sorts for First-Order Satisfiability

Frontiers of Combining Systems

2013

Self Cite

Abstract. In this paper we investigate the finite satisfiability problem for firstorder logic. We show that the finite satisfiability problem can be represented as a sequence of satisfiability problems in a fragment of many-sorted logic, which we call the non-cyclic fragment. The non-cyclic fragment can be seen as a generalisation of the effectively propositional fragment (EPR) in the many-sorted setting. We show that the non-cyclic fragment is decidable by instantiation-based methods and present a linear time algorithm for checking whether a given clause set is in this fragment. One of the distinctive features of our finite satisfiability translation is that it avoids unnecessary flattening of terms, which can be crucial for efficiency. We implemented our finite model finding translation in iProver and evaluated it over the TPTP library. Using our translation it was possible solve a large class of problems which could not be solved by other systems.

“…We have implemented set, tree and OBDD labels in our iProver-Eq system (see [7]) and evaluated it with the TPTP benchmark library v4.0.1. We have used a cluster of Intel Xeon Quad Core machines with 2.33GHz and 2GB of memory limit and ran each of the 13783 problems for at most 120 seconds.…”

Section: Implementation and Evaluationmentioning

confidence: 99%

Labelled Unit Superposition Calculi for Instantiation-Based Reasoning

Logic for Programming, Artificial Intelligence, and Reasoning

Sticksel

2010

Self Cite

Abstract. The Inst-Gen-Eq method is an instantiation-based calculus which is complete for first-order clause logic modulo equality. Its distinctive feature is that it combines first-order reasoning with efficient ground satisfiability checking which is delegated in a modular way to any state-of-the-art ground SMT solver. The first-order reasoning modulo equality employs a superposition-style calculus which generates the instances needed by the ground solver to refine a model of a ground abstraction or to witness unsatisfiability. In this paper we present and compare different labelling mechanisms in the unit superposition calculus that facilitates finding the necessary instances. We demonstrate and evaluate how different label structures such as sets, AND/OR trees and OBDDs affect the interplay between the proof procedure and blocking mechanisms for redundancy elimination.