Ion induced charge collection and SEU sensitivity of emitter coupled logic (ECL) devices

Abstract

This paper presents single event upset (SEU) and latchup test results for selected Emitter Coupled Logic (ECL) microcircuits, including several types of low capacity SRAMs and other memory devices. The high speed of ECL memory devices makes them attractive for use in space applications. However, the emitter coupled transistor design increases susceptibility to radiation induced functional errors, especially SEU, because the transistors are not saturated, unlike the transistors in a CMOS device. Charge collection at the sensitive nodes in ECL memory elements differs accordingly. These differences are responsible, in part, for the heightened SEU vulnerability of ECL memory devices relative to their CMOS counterparts.Because the coupled transistors in an ECL memory cell remain in a non-saturated state continuously, the charge collection characteristics and SEU susceptibility of these devices differs from those fabricated in CMOS or TTL technology, For example, in ECL devices prompt charge collection at the sensitive nodes appears to be more important than drift charge collection in causing upset.In the following, we present SEU and latchup results relevant to the use of ECL devices in space, and discuss the implications of these findings for our current understanding of upset mechanisms in this famiry of devices. p "cc .

Total Dose and Single Event Effect Characterization of ECL Devices

“…Total dose and SEE test data is available for ECL devices manufactured by Plessey and National Semiconductor [1,2]. As our design required operation at about 1 GHz, no devices from National Semiconductor were available which could operate at such a high frequency.…”