(Invited) Low Frequency Noise Performance of State-of-the-Art and Emerging CMOS Devices

Abstract

The development of future CMOS technologies in line with the ITRS roadmap necessitates not only a scaling of the critical device dimensions but also implies the introduction of new materials and even switching over to alternative horizontal, vertical or 3D device architectures. This paper aims to give an overview of the impact of some of these approaches on the low frequency noise performance and to give an outlook for the future.