(Invited) Assessment of Durable SiC JFET Technology for +600° to -125° Integrated Circuit Operation

Abstract

Electrical characteristics and circuit design considerations for prototype 6H-SiC JFET integrated circuits (ICs) operating over the broad temperature range of -125 °C to +600 °C are described. Strategic implementation of circuits with transistors and resistors in the same 6H-SiC n-channel layer enabled ICs with nearly temperature-independent functionality to be achieved. The frequency performance of the circuits declined at temperatures increasingly below or above room temperature, roughly corresponding to the change in 6H-SiC n-channel resistance arising from incomplete carrier ionization at low temperature and decreased electron mobility at high temperature. In addition to very broad temperature functionality, these simple digital and analog demonstration integrated circuits successfully operated with little change in functional characteristics over the course of thousands of hours at 500 °C before experiencing interconnect-related failures. With appropriate further development, these initial results establish a new technology foundation for realizing durable 500 °C ICs.

Operational Testing of 4H-SiC JFET ICs for 60 Days Directly Exposed to Venus Surface Atmospheric Conditions

“…These observed trends are generally consistent with high temperature burn-in trends previously seen for ring oscillator ICs in which frequency slightly increased over first 1000-2000 hours of high temperature testing [29]- [32]. The observed substantial decrease in frequency with increasing temperature (∼ 4-fold drop from 25 • C to 460 • C) is quantitatively consistent with trends and mechanisms previously reported for this 4H-SiC JFET IC technology [27], [39].…”

“…2 clock IC output signal amplitudes recorded by the oscilloscope are well below the ∼ 10 V logic swing reported in 500 • C Earth-air oven testing of this same chip design [31], [32], and there are also significant differences evident between starting (0 days) and ending (60 days) amplitudes. These observations are consistent with understood behaviors seen in preceding studies of SiC JFET ring oscillator ICs [26], [27], [30], [33], [39]. It is well known that measurement probe loading effects must be considered when measuring electrical signals using an oscilloscope, especially when measuring circuits with both high output resistance and high frequency signal (as is the case for these clock ICs) [40].…”

Practical nanoscale field emission devices for integrated circuits

“…5 Solid-state transistors fail at high temperature when electrons in the p-doped regions are thermally excited to the same conduction electron concentration as in the n-doped regions. This effectively eliminates p-n junctions, limiting the maximum operating temperature for silicon MOSFETs to approximately 300 C, 6 and silicon carbide (SiC) transistors to 600 C. 7 Field emission devices can be operated at elevated temperatures because the device current remains exponentially dependent on the field until much higher temperatures where thermionic emission dominates. Recently, SiC nanoneedle field emitting arrays have been successfully operated at 500 C. 8 Moreover, high radiation environments shorten the lifetime of solid-state transistors by damaging the crystal lattice of the semiconductor, decreasing minority carrier lifetimes and increasing the resistance.…”

Self-Oscillatory DC-DC Converter Circuits for Energy Harvesting in Extreme Environments

“…As can be seen from the data, the efficiency is lower at higher temperatures. This reduction is to be expected, as the resistance of the JFET channel increases due to the reduction in electron mobility [44] and the parasitic resistance of the inductor winding increasing. The diode voltage drop of the SiC Schottky diode also increases with temperature [45], however the effect is minor in comparison to the changes in the JFET and inductor.…”