Investigation on the properties and processability of polymeric insulation layers for through silicon via

2015 IEEE 65th Electronic Components and Technology Conference (ECTC)

Jiang

Liu

et al. 2015

Self Cite

This paper reports a fabrication process for the deposition of a polymer insulation layer on the sidewall of through silicon vias in wafer level packaging. The novolac resin based glue was used as precursor to prepare the insulation layer. The glue is a Newtonian fluid and has low viscosity (24 mPa*s @ 100 l/s) as well as low contact angle (25.9 o ) to silicon. The resultant polymer insulation layer has a shearing strength as high as 25.8 Kg/mm 2 . Furthermore, the polymer insulation layer exhibits good uniformity in thickness and roughness over the whole 8'' wafer. On the conformal coating of the polymer insulation layer, the Ti/Cu seed layer and Cu conductive layer were fabricated by PVD and electroplating. Therefore, all the results show that the polymer materials could be a reliable and economical solution for the TSV insulator in the view of wafer level packaging. IntroductionThree dimensional (3D) integration circuit technology affords significant promise to release the power, improve the performance and computational tradeoffs inherent in conventional planar circuit topologies, and makes through silicon via (TSV) appear to be one of the greatest technology challenges, inspiringly, the TSV technology has been successfully applied in CMOS image sensors (CIS) widely [1,2]. However, the aspect ratio of TSV for CIS is much smaller than that for interposer. Therefore, there are several options for fabricating conformal insulation layer on wafer level packaging.

Section: Introductionmentioning

confidence: 99%

Fabricating polymer insulation layer by spin-coating for through silicon vias

2015 IEEE 65th Electronic Components and Technology Conference (ECTC)

Jiang

Liu

et al. 2015

Self Cite

“…In our previous study, in order to develop low cost and convenient insulation process, polymeric insulation layers of TSV were fabricated by spin-coating [3]. In the process of spin-coating, the surface of insulated substrate was wetted by polymer liquid.…”

Section: Introductionmentioning

confidence: 99%

Wetting behavior of polymer liquid in insulation process for through silicon via

Zhao

2013 14th International Conference on Electronic Packaging Technology

Sun

et al. 2013

Self Cite

3D packaging using through silicon via (TSV) technology is becoming important in the integrated circuit (IC) packaging industry. This paper reports the wetting behavior of polymer liquids in the insulation deposition process by spin coating. Two methods containing adding wetting agent into polymer liquid and coupling agent treatments to wafer surface were implemented to improve the wettability between the liquid and the wafer. From the viscosity tests, it was found that the wetting agent could improve the flowability and have little effect on the thixotropy of liquid. Besides, the surface tension of liquid was shifted to 31.14 mN/m from 32.16 mN/m with the addition of wetting agent. The coupling agent treatment to sidewall of vias (silicon) could increase the adhesion work value by at least 8 mN/m and avoid the sagging. Moreover, the wetting dynamics revealed that adding wetting agent to polymer liquid and coupling agent treatments to wafer could improve the wetting rate and decrease the balanced contact angle.

“…Cui et al have investigated the TSV with polymer as insulation layers and indicated that replacing SiO 2 with polymer as liners comparatively reduces TSV capacitance. [4] Therefore, polymer has several attributes that make it an attractive candidate for insulation of TSV.…”

Section: Introductionmentioning

confidence: 99%

O<inf>2</inf> plasma treatment in polymer insulation process for through silicon vias

Zhuang

Jiang

2014 15th International Conference on Electronic Packaging Technology

et al. 2014

Self Cite

Through silicon via (TSV) technology has been widely applied in CMOS image sensors (CIS). This paper reports the wetting behavior of polymer liquid in the TSV insulation process by spin coating. The O 2 plasma treatment was used to increase the hydrophilicity of the substrate surface in order to reduce the adhesion between the polymer liquid and the via sidewall. This surface treatment was to ensure that the polymer liquid can enter the vias smoothly. Besides, the O 2 plasma treatment to the wafer could also improve the wetting rate and decrease the balanced contact angle. During the course of the present study, different parameters of power and time of O 2 plasma treatment were used to modify the wafer surface and the sidewall of vias. The optimal O 2 plasma treatment condition was determined with the power of 160 W and the processing time of 25 s. It was confirmed that the method of O 2 plasma treatment is beneficial to the wetting in the deposition process of the polymer insulation layer for TSVs. Keywords-through silicon via; O 2 plasma treatment; polymer liquid; insulation; adhesion 2014 15th International Conference on Electronic Packaging Technology 978-1-4799-4707-2/14/$31.00 ©2014 IEEE