Investigation of the RTN Distribution of Nanoscale MOS Devices From Subthreshold to On-State

Abstract

This letter presents a numerical investigation of the statistical distribution of the random telegraph noise (RTN) amplitude in nanoscale MOS devices, focusing on the change of its main features when moving from the subthreshold to the on-state conduction regime. Results show that while the distribution can be well approximated by an exponential behavior in subthreshold, large deviations from this behavior appear when moving toward the on-state regime, despite a low probability exponential tail at high RTN amplitudes being preserved. The average value of the distribution is shown to keep an inverse proportionality to channel area, while the slope of the high-amplitude exponential tail changes its dependence on device width, length, and doping when moving from subthreshold to on-state.

Interplay between quantum mechanical effects and a discrete trap position in ultra-scaled FinFETs

“…Indeed, the impact of the trap located on top oxide of the fin increases when the fin size increases. This behaviour is opposite to the trend expected in conventional planar MOSTEFs [11,12].…”

Inverse Scaling Trends for Charge-Trapping-Induced Degradation of FinFETs Performance

“…It is very important to note that both DD and NEGF results confirm a positive trend between the V G value and the gate drive voltage V G . The V G increases moving from subthreshold to ON-state region, in contrast to what showed by conventional planar MOSFETs [11]. This trend is confirmed for intermediate V G values (not shown for brevity).…”

“…Indeed, the impact of the top-fin located trap increases when we increase the fin size. This behavior is counterintuitive compared with the trends expected for conventional planar MOSFETs [11]. Fig.…”

“…2, where the ON-current decreases with shrinking the fin dimensions due to the perpendicular field dependence of the mobility. Therefore, to have a consistent comparison between DD and NEGF results in the ON-state region, we have evaluated V G as a function of V G (as in [10]) instead of function of the current criterion [11]. Fig.…”

Quantum insights in gate oxide charge-trapping dynamics in nanoscale MOSFETs

“…For example, the reliability of SRAM memory cells has been shown to be affected by charge trapping-induced instabilities starting from the 40nm technology node [13]. The importance of these effects increases proportionally to the cell scaling [14][15][16][17], advocating for a reliability-aware CMOS design. The latter is virtually unachievable without an accurate understanding of the physics governing the RTN and BTI phenomena, including (i) the effects related to the quantum nature of charge transport and trapping in nanoscale devices [18][19], (ii) the effects of variability induced by the atomistic nature of dopants [20][21][22], (iii) the transient effects governing the charge transfer of carriers from channel to traps [23].…”