Investigation of Radiation Effects and Hardening Procedures for CMOS/SOS

Peel, J. L.; Pancholy, R. K.; Kuhlmann, G. J.; Oki, Takeo; Williams, Ross

doi:10.1109/tns.1975.4328102

Cited by 23 publications

(3 citation statements)

References 15 publications

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“…This shift is substantially less than that obtained with standard gate oxides as shown in Fig. Aubuchon and Harari 204 and Peel et al 205 studied various gate oxidation procedures in conjunction with a standard aluminum gate CMOS-SOS process. Phillips 198 ' 203 investigated CMOS-SOS logic gates made with standard gate oxides and found that a dose rate in excess of 10 10 rad(Si)/sec was necessary to cause a logic upset.…”

Section: Radiation Studiesmentioning

confidence: 76%

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The Properties of Silicon-on-Sapphire Substrates, Devices, and Integrated Circuits

Ipri

1981

Silicon Integrated Circuits

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Section: Radiation Studiesmentioning

confidence: 76%

“…99. Peel et al 205 also used a deep boron implant to minimize the back channel currents. Kjar and Peel.…”

Section: Radiation Studiesmentioning

confidence: 99%

The Properties of Silicon-on-Sapphire Substrates, Devices, and Integrated Circuits

Ipri

1981

Silicon Integrated Circuits

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“…From the significant reduction in the radiation-induced oxide charge obtained for steam/HC1 oxides at 875~ it may be concluded that even under these conditions clean oxides can be obtained (52). This radiation-induced charge buildup is believed to be due to the liberation during irradiation of neutral sodium (not mobile with BT stress) bonded with coulombic forces to oxygen vacancies (53).…”

Section: J Electrochem Soc: Solid-statementioning

confidence: 99%

Oxidation of Silicon in the Presence of Chlorine and Chlorine Compounds

Singh¹,

Balk²

1978

J. Electrochem. Soc.

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The need for higher manufacturing yields and improved operational reliability of semiconductor devices and circuits has led to a continuing scrutiny of all processing steps. Topic of the present paper is the effect of addition of chlorine or one of its compounds during silicon oxidation. After discussing oxidation kinetics in the presence of halogens and the metallurgical aspects of the process, a comprehensive review of the electrical effects is given. Attention is paid to the elimination of oxide charge centers and interface states, surface stabilization and enhanced dielectric behavior in MOS structures, and to the increased minority carrier lifetime in the silicon substrate. The improvements in device characteristics which have been attained using this method are summarized.

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Radiation Effects and Circuit Hardening

2002

Cmos Memory Circuits

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The advent of extraterrestrial space utilization, and the requirements to operate many advanced military and some commercial systems in radioactive environments, brought the radiation hardening of semiconductor integrated circuits to the mainstream of the technological developments. Among the various CMOS integrated circuit types, the CMOS memory circuits manifest the highest susceptibility to the effects of radioactive radiation events and, usually, their hardness limits the applicability of the system in radiation environments. To improve the radiation hardness of CMOS memories special processing, device and circuit techniques can be used. This final chapter introduces those radiation effects on CMOS-bulk and CMOS SOI (SOS) transistor devices and circuits which are important to memory designs, and discloses the circuit and design techniques which may be applied to enhance the radiation hardness of CMOS-bulk and CMOS SOI (SOS) memories. The presentation of CMOS SOI (SOS) supports both hardened and nonhardened designs and includes the effects of floating substrates, side-and back-channels, and diode-like nonlinear elements. Radiation Effects Radiation Hardening Designing Memories in CMOS SOI (SOS)

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Investigation of Radiation Effects and Hardening Procedures for CMOS/SOS

Cited by 23 publications

References 15 publications

The Properties of Silicon-on-Sapphire Substrates, Devices, and Integrated Circuits

The Properties of Silicon-on-Sapphire Substrates, Devices, and Integrated Circuits

Oxidation of Silicon in the Presence of Chlorine and Chlorine Compounds

Radiation Effects and Circuit Hardening

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