Investigation of p-channel and n-channel junctionless gate-all-around polycrystalline silicon nanowires with silicon nanocrystals nonvolatile memory

Yeh, Mu-Shih; Wu, Yu‐Chung; Chung, Ming-Hsien; Jhan, Yi‐Ruei; Chang‐Liao, Kuei‐Shu; Liu, Kuancheng; Wu, Mengqi; Hung, Min-Feng

doi:10.1063/1.4891815

Cited by 8 publications

(4 citation statements)

References 16 publications

(17 reference statements)

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“…Junctionless (JL) devices have gained much attention of microelectronics industry, because it is compatible with CMOS (complementary metal-oxide-semiconductor) technology and can be useful for 3D devices (1)(2)(3)(4)(5)(6). In addition, the JL devices present some advantages over traditional FET (field effect transistor) devices.…”

Section: Introductionmentioning

confidence: 99%

“…For n-type channel and negative gate bias (V g ), the current flow through the channel increases with V g value (ON state) due to the heavy channel doping. Furthermore, JL devices present low leakage current, good sub-threshold slope, and, at high temperature, present high mobility and little diffusion of impurities (1)(2)(3)(4)(5)(6)(7). Another advantage of JL transistors is the simple fabrication process; since no source and drain formation is required.…”

Section: Introductionmentioning

confidence: 99%

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N-Junctionless Transistor Prototype: Manufacturing Using a Focused Ion Beam System

et al. 2015

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Junctionless (JL) devices were fabricated using focused ion beam (FIB) system for Si milling (to define the Si nanowire (SiNW)) and for gate dielectric (SiO 2 ), gate, drain and source electrode (Pt) deposition. Energy dispersive spectroscopy (EDS) measurements confirmed the presence of Ga + into SiNW. The influence of Ga + incorporation into SiNW, due to Si milling, was studied in this work. Electrical measurements results indicate that the Ga + incorporation can affect the SiNW properties (doping concentration), and consequently, the JL performance (distortions on electrical characteristics). In addition, the simulated JL transistors (considering the Ga + incorporation) results are in good agreement with the electrical characteristics extracted from the fabricated JL devices. Therefore, the experimental results indicate that our fabrication method using FIB system can be used to obtain prototypes of JL devices.

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Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

N-Junctionless Transistor Prototype: Manufacturing Using a Focused Ion Beam System

et al. 2015

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“…Besides, the SONOS NVM not only has thinner tunnel oxide but also has good reliability. [12][13][14] In addition to a nitride layer for discrete storage, NVMs also have a nano crystal layer to improve retentionability. 15,16 Recent research 13 has used quantum dot (SOncOS) as deep trapping level, however, this work improved NN middle of interface defects as deep trapping level.…”

mentioning

confidence: 99%

“…[12][13][14] In addition to a nitride layer for discrete storage, NVMs also have a nano crystal layer to improve retentionability. 15,16 Recent research 13 has used quantum dot (SOncOS) as deep trapping level, however, this work improved NN middle of interface defects as deep trapping level. Quantum dots have more complex process, and unexpected uniformity that enhance variance of memory characteristics.…”

mentioning

confidence: 99%

Artificial Defects in Si₃N₄Enhance Nonvolatile Memory Performance of Ultra-Thin Body Poly-Si Junctionless Field-Effect Transistors

Lin

Wang

Chen

et al. 2016

ECS J. Solid State Sci. Technol.

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This work presents a trench structure with n-type and p-type junctionless field-effect transistor (JL-FET) based on ultra-thin body (UTB) nonvolatile memory (NVM) devices with double stacked Si3N4 defect charge trapping layers (NN-CTLs). The n-type device exhibits excellent memory characteristics, including high program/erase (P/E) speed, good endurance (>104 cycles) and excellent (10-year) data retention at 85°C which achieve memory industry requirement. This simple double stacked Si3N4 trench JL-FET structure provides extra deep charge trapping sites in CTL, which improves the performance of JL-SONNOS NVMs for 3D NAND flash applications.

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Size‐Dependent Structures and Optical Absorption of Boron‐Hyperdoped Silicon Nanocrystals

Zhou

et al. 2016

Advanced Optical Materials

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and intermediate-band transition for bulk Si. [ 19,20 ] For Si NCs, hyperdoping is also emerging as an effective means to obtain novel properties. [21][22][23][24][25][26] For instance, localized surface plasmon resonance (LSPR) may occur to hyperdoped Si NCs. [21][22][23] And the energy of the LSPR can be conveniently tuned by the doping level.It is well known that the properties of intrinsic Si NCs are critically dependent on the NC size. [ 27,28 ] However, the size effect for hyperdoped Si NCs has been hardly explored. Previous work simply focused on the effect of the doping level. It has been recently predicted that the LSPR of hyperdoped Si NCs can be controlled by not only the doping level but also the NC size. [ 29 ] This highlights that the critical role played by the size effect may remain for Si NCs after hyperdoping. Therefore, it is of great interest to also investigate the size effect for hyperdoped Si NCs. Knowledge concerning the effect of the NC size on the dependence of the properties of hyperdoped Si NCs on the doping level should be invaluable for the synthesis of hyperdoped Si NCs with desired functionality.In this work, Si NCs hyperdoped with different B-doping levels are considered. The dependence of the physical properties of hyperdoped Si NCs on the NC size is examined. It is shown that the largest Si NCs undergo a stronger reduction of the average lattice spacing upon doping with respect to the smallest ones. While Raman, subbandgap optical absorption and the LSPR spectra are all modifi ed with increasing B concentrations in Si NCs, they also indicate that the largest Si NCs are less affected by disorder and charge carrier surface scattering. As a result, there exists a range of doping concentrations where the LSPR energy can be blueshifted as the NC size decreases. Results and DiscussionBoth B-hyperdoped and undoped Si NCs with different sizes have been synthesized by using SiH 4 -based nonthermal plasma. [ 6,[30][31][32] The atomic concentrations of B in B-hyperdoped Si NCs are ≈17%, 36%, and 60%, which are measured with inductively coupled plasma-atomic emission spectroscopy (ICP-AES). Transmission electron microscopy (TEM) and Raman

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Investigation of p-channel and n-channel junctionless gate-all-around polycrystalline silicon nanowires with silicon nanocrystals nonvolatile memory

Abstract: Articles you may be interested inThermoelectric power factor enhancement with gate-all-around silicon nanowires

Cited by 8 publications

References 16 publications

N-Junctionless Transistor Prototype: Manufacturing Using a Focused Ion Beam System

N-Junctionless Transistor Prototype: Manufacturing Using a Focused Ion Beam System

Artificial Defects in Si₃N₄Enhance Nonvolatile Memory Performance of Ultra-Thin Body Poly-Si Junctionless Field-Effect Transistors

Size‐Dependent Structures and Optical Absorption of Boron‐Hyperdoped Silicon Nanocrystals

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Investigation of p-channel and n-channel junctionless gate-all-around polycrystalline silicon nanowires with silicon nanocrystals nonvolatile memory

Abstract: Articles you may be interested inThermoelectric power factor enhancement with gate-all-around silicon nanowires

Cited by 8 publications

References 16 publications

N-Junctionless Transistor Prototype: Manufacturing Using a Focused Ion Beam System

N-Junctionless Transistor Prototype: Manufacturing Using a Focused Ion Beam System

Artificial Defects in Si3N4Enhance Nonvolatile Memory Performance of Ultra-Thin Body Poly-Si Junctionless Field-Effect Transistors

Size‐Dependent Structures and Optical Absorption of Boron‐Hyperdoped Silicon Nanocrystals

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Artificial Defects in Si₃N₄Enhance Nonvolatile Memory Performance of Ultra-Thin Body Poly-Si Junctionless Field-Effect Transistors