Investigation of Interface Diffusion in Sputter Deposited Gd0.1Ce0.9O1.95 Thin Buffer Layers on Y-Stabilized Zirconia Crystalline Substrates for Solid Oxide Cells Applications

Coppola, Nunzia; Carapella, G.; Sacco, Chiara; Orgiani, P.; Galdi, Alice; Polverino, Pierpaolo; Maritato, L.; Pianese, Cesare

doi:10.4172/2169-0022.1000482

Cited by 2 publications

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“…Here, we extend the results shown in Reference [14] to the case of GDC barrier layers sputter-deposited at room temperature on polycrystalline YSZ 35 mm in diameter, and annealed after the deposition up to 1000 • C. The X-ray Diffraction (XRD) analysis showed the achievement of the desired GDC phase and the electrochemical measurements have allowed optimizing the post deposition annealing procedure. The comparison of the final performances among the SOFCs with sputtered GDC layer and those with screen-printed GDC layer have shown highly better performances both on the high frequency and low frequency resistance properties of the cells with sputter-deposited GDC layers, allowing to link the structural and stoichiometric quality of the produced samples with the final electrochemical behavior.…”

Section: Introductionsupporting

confidence: 61%

“…Typical deposition parameters are 400 W power applied at 13 MHz and 2.2 mTorr process gas (Ar) pressure. Previous studies allow measuring the deposition rate and its reproducibility during the time; typical deposition rate is about 30 nm/min and remains the same during the target lifetime [14].…”

Section: Samples Preparationmentioning

confidence: 99%

“…We have recently shown, for room temperature sputter-deposited GDC/YSZ crystalline interfaces [14], the possibility to obtain, by a post deposition annealing process, the desired GDC phase with the absence of consistent inter-diffusion phenomena at the GDC/YSZ interface at least for annealing temperatures up to 1000 • C. This result is particularly promising in view of the production of SOFC with sputter-deposited GDC barrier layers without any presence of low conducting spurious phases due to the high temperature reaction between GDC and YSZ.…”

Section: Introductionmentioning

confidence: 99%

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Structural and Electrical Characterization of Sputter-Deposited Gd0.1Ce0.9O2−δ Thin Buffer Layers at the Y-Stabilized Zirconia Electrolyte Interface for IT-Solid Oxide Cells

et al. 2018

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The use of a doped Ceria buffer layer and Physical Vapour Deposition (PVD) techniques for Solid Oxide Fuel Cells (SOFC) fabrication can limit the former, the formation of electrical insulating lanthanum, and strontium zirconates at the cathode/electrolyte interface, whereas the latter allows a better control of the materials interfaces. These effects allow for operation at intermediate temperature ranges. In this work, we study the structural and electrical properties of Gadolinium Doped Ceria (GDC) barrier layer deposited via the room temperature RF Sputtering technique on anode supported electrolytes and then annealed at high temperature. The crystal structure and the surface morphology of the GDC barrier layers have been analyzed and optimized varying the temperature ramp of the post-growth annealing procedure. The electrical behavior of the obtained samples has been investigated by Electrochemical Impedance Spectroscopy and compared to that of standard SOFC with screen-printed GDC barrier layers, the former showing a maximum high frequency and low frequency resistances reduction of about 50% and 46%, respectively, with respect to the latter at an operating temperature of 650 • C. The results clearly show an important improvement of SOFC performances when using sputter deposited GDC layers, linking the electrical properties to the structural and stoichiometric ones.

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Section: Introductionsupporting

confidence: 61%

Section: Samples Preparationmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Structural and Electrical Characterization of Sputter-Deposited Gd0.1Ce0.9O2−δ Thin Buffer Layers at the Y-Stabilized Zirconia Electrolyte Interface for IT-Solid Oxide Cells

et al. 2018

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Effects of In-Air Post Deposition Annealing Process on the Oxygen Vacancy Content in Sputtered GDC Thin Films Probed via Operando XAS and Raman Spectroscopy

Coppola,

Ur Rehman,

Carapella

et al. 2024

ACS Appl. Electron. Mater.

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We investigate the ionic mobility in room-temperature RF-sputtered gadolinium doped ceria (GDC) thin films grown on industrial solid oxide fuel cell substrates as a function of the air-annealing at 800 and 1000 °C. The combination of X-ray diffraction, X-ray photoelectron spectroscopy, operando X-ray absorption spectroscopy, and Raman spectroscopy allows us to study the different Ce 3+ / Ce 4+ ratios induced by the post growth annealing procedure, together with the Ce valence changes induced by different gas atmosphere exposure. Our results give evidence of different kinetics as a function of the annealing temperature, with the sample annealed at 800 °C showing marked changes of the Ce oxidation state when exposed to both reducing and oxidizing gas atmospheres at moderate temperature (300 °C), while the Ce valence is weakly affected for the 1000 °C annealed sample. Raman spectra measurements allow us to trace the responses of the investigated samples to different gas atmospheres on the basis of the presence of different Gd−O bond strengths inside the lattice. These findings provide insight into the microscopic origin of the best performances already observed in SOFCs with a sputtered GDC barrier layer annealed at 800 °C and are fundamental to further improve sputtered GDC thin film performance in energy devices.

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Investigation of Interface Diffusion in Sputter Deposited Gd0.1Ce0.9O1.95 Thin Buffer Layers on Y-Stabilized Zirconia Crystalline Substrates for Solid Oxide Cells Applications

Cited by 2 publications

References 0 publications

Structural and Electrical Characterization of Sputter-Deposited Gd0.1Ce0.9O2−δ Thin Buffer Layers at the Y-Stabilized Zirconia Electrolyte Interface for IT-Solid Oxide Cells

Structural and Electrical Characterization of Sputter-Deposited Gd0.1Ce0.9O2−δ Thin Buffer Layers at the Y-Stabilized Zirconia Electrolyte Interface for IT-Solid Oxide Cells

Effects of In-Air Post Deposition Annealing Process on the Oxygen Vacancy Content in Sputtered GDC Thin Films Probed via Operando XAS and Raman Spectroscopy

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