Investigation of Bulk Traps by Conductance Method in the Deep Depletion Region of the Al2O3/GaN MOS Device

Abstract

Conductance method was employed to study the physics of traps (e.g., interface and bulk traps) in the Al2O3/GaN MOS devices. By featuring only one single peak in the parallel conductance (G p/ω) characteristics in the deep depletion region, one single-level bulk trap (E C-0.53 eV) uniformly distributed in GaN buffer was identified. While in the subthreshold region, the interface traps with continuous energy of E C-0.4~0.57 eV and density of 0.6~1.6 × 1012 cm−2 were extracted from the commonly observed multiple G p/ω peaks. This methodology can be used to investigate the traps in GaN buffer and facilitates making the distinction between bulk and interface traps.

Aberrant photoelectric effect in the topological insulator/n-GaN heterojunction (Bi2Te3/n-GaN) under unpolarized illumination

“…The good linear fitting in the reverse bias indicated the near absence of surface states, which affected the linearity of the 1/ C 2 – V plot in the case of the charging and discharging of the traps. 53 The capacitance–frequency ( C – f ) plot (refer to Fig. S7b in the ESI†) showed an almost linear decrease in the capacitance under reverse bias, without any major peak, confirming the negligible presence of traps in this region.…”

“…S7b in the ESI†) showed an almost linear decrease in the capacitance under reverse bias, without any major peak, confirming the negligible presence of traps in this region. 53 To further study the trap characteristics, including the trap levels and the trap density, frequency ( f ) dependence conductance ( G p ) measurements were performed. Here, G p / ω versus the radial frequency ( ω = 2π f ) was plotted to study the trap density and trap response time.…”

Sensing Remote Bulk Defects through Resistance Noise in a Large-Area Graphene Field-Effect Transistor

“…Interfacial traps can exist at both graphene/SiO 2 and SiO 2 /Si interfaces and inside the oxide dielectrics . There also exists SRH-type defects, responsible for generation-recombination (GR) noise inside the bulk of the silicon. ,− When the substrate is in the accumulation or inversion region, the effect of the bulk defects will be negligible compared to the interfacial traps, as the accumulation or inversion layer will screen any type of such charge fluctuations. In the depletion region, there will be three effects.…”

GaN‐Based Monolithic Inverter Consisting of Enhancement‐ and Depletion‐Mode MOSFETs by Si Ion Implantation

“…Reason for this behavior was not clear; however, one possibility was the effect of deep bulk trap. Shi et al pointed out that a decrease in the slope of C – V in the deep depletion region implied the existence of residual deep trap states using the conductance method. In this study, to discuss the Si‐implantation effect, we have focused on the difference of C – V curves in the depletion region between the different Si dose samples from the same GaN wafer.…”