Investigating linearity and effect of temperature variation on analog/RF performance of dielectric pocket high-k double gate-all-around (DP-DGAA) MOSFETs

Abstract

The present paper is about using three popular performance boosters in a device to battle with deterioration in device characteristics imposed by temperature variation. The dielectric pocket (DP) technology has been utilized in double gate-allaround MOSFET to limit the leakage current problem. Further, high-K dielectric as gate oxide is employed so that ON-state current may be improved with enhanced device scalability. The boosted immunity towards short-channel effects (SCEs) and improvement in the device's analog performance is demonstrated through comparison between dielectric pocket high-K double Gate-All-Around (DP-DGAA) and double Gate-All-Around (DGAA) MOSFETs with temperature variation from 300 to 500 K by using commercially available ATLAS, a three-dimensional (3D) device simulator from SILVACO.

Investigating the Impact of Self-Heating Effects on some Thermal and Electrical Characteristics of Dielectric Pocket Gate-all-around (DPGAA) MOSFETs

“…The DP MOSFET is getting a lot of attention as a potential architecture due to restrained SCEs and minimized Off-current [5][6]. The Off-current (I off ) gets reduced as the DP acts as a diffusion stopper and impedes the path of punch through [7].…”

A Rigorous Analysis of Self-Heating Effects in Nanoscale Dielectric Pocket Double-Gate-All-Around (DP-DGAA) MOSFETs

“…They exhibit superb electrostatic control over the channel, less influenced by short channel effects (SCEs), and superior packing density with steep subthreshold characteristics [7][8]. However, in our previous investigation, the Dielectric Pocket (DP) GAA and Doublegate-all-around (DGAA) have been shown as potential candidates to achieve high performance and ultra-low power dissipation due to reduced off-state current [9][10].…”