Investigating a lithography strategy for diagonal routing architecture at sub-100nm technology nodes

Abstract

The X Architecture offers the potential to produce smaller and faster integrated circuits through the pervasive use of 45 wirings on the upper metal layers. The X Initiative members have demonstrated its manufacturability and integrationworthiness at the 130nm, 90nm and 65nm process technology nodes. This paper explores the use of off-axis lithography illumination to print 45 diagonal wires at leading technology nodes. The paper also describes the RET strategies employed for the X Architecture and the effectiveness of various illumination sources at various process nodes. Process window and metal wiring CD variation of Manhattan and X Architecture are compared in the simulations using different types of illuminators. Simulation shows that using 193nm light source, Manhattan and X designs can easily be printed with different types of illuminating source in either 90nm or 65nm process node. Silicon test chips at 90nm that include typical X routing patterns are designed to verify the printability of X Architecture wirings. Electrical measurements as well as SEM analysis are conducted and results show that the fidelity of diagonal wirings is as good as traditional Manhattan routings.