Interoperability Analysis of Systems

Abstract

This work deals with the analysis of the behavioural interoperability of systems in a designing context. Systems to be analysed are modelled as UML architectures in terms of assembly of components, the behaviour of which are defined by State Machines. Two interoperability levels are identified: the absence of deadlock, and the preservation of the required services and usage protocols. The analysis starts in automatically transforming the behaviour of an architecture into a Labelled Transition System. A deadlock search can be then performed through model checking tools. Relations enabling components to be substituted without analysing again the whole system are identified, which leads to define a notion of component compatibility. This analysis technique checks if the interoperability of the new system is altered or preserved. Three cases are underlined: (i) the new system exhibits deadlocks: it is not interoperable any more, (ii) it is deadlock free, (iii) it is deadlock free and moreover conforms to the previous one. Results are illustrated through a case study.

Designing and Integrating Complex Systems: Be Agile Through Liveness Verification and Abstraction

“…You can refer to [15] and [18] to get details about the transformation. Figure 6(a) illustrates the LTS generated from the state machine of component V76, and Figure 6(b) the LTS associated with the sequence diagram of the architecture V76-DL.…”