2021
DOI: 10.1117/1.jmm.20.4.044601
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International Roadmap for Devices and Systems lithography roadmap

Abstract: Background: Planned improvements in semiconductor chip performance have historically driven improvements in lithography and this is expected to continue in the future. The International Roadmap for Devices and Systems roadmap helps the industry plan for the future. Aim:The 2021 lithography roadmap shows requirements, possible options, and challenges for the next 15 years.Results: Critical dimensions in logic chips are now small enough that stochastics, i.e., random variations in photon, molecules, and photores… Show more

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Cited by 45 publications
(27 citation statements)
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“…For light source, the LPP source still be used, but power of light source which is applying on the EUV lithography machine is not enough to print smaller pattering. To achieve 10 nm half-pitch patterning, doses should larger than 80 mJ/cm 2 [24]. Throughput will low significantly if power of light source is too low.…”
Section: High-na Euv Lithography Machinementioning
confidence: 99%
“…For light source, the LPP source still be used, but power of light source which is applying on the EUV lithography machine is not enough to print smaller pattering. To achieve 10 nm half-pitch patterning, doses should larger than 80 mJ/cm 2 [24]. Throughput will low significantly if power of light source is too low.…”
Section: High-na Euv Lithography Machinementioning
confidence: 99%
“…Sub-10 nm BCP patterns are highly suitable for the pattern transfers onto underlying target materials without superexpensive lithography equipment. , Therefore, alternative nanolithography for semiconductor device fabrication has been one of the most actively investigated technological fields for employing BCP nanopatterning for industrial-level mass production. The International Roadmap for Devices and Systems (IRDS) has predicted that directed self-assembly (DSA) of BCPs would be applicable in the fabrication of next-generation semiconductor devices for the contact-hole shrinkage and pattern multiplications . Nevertheless, the eventual standardized application of BCP nanopatterning in highly mature practical semiconductor processes requires precise control of pattern orientation and structural defect formation over an arbitrarily large area.…”
Section: Introductionmentioning
confidence: 99%
“…The International Roadmap for Devices and Systems (IRDS) has predicted that directed self-assembly (DSA) of BCPs would be applicable in the fabrication of nextgeneration semiconductor devices for the contact-hole shrinkage and pattern multiplications. 6 Nevertheless, the eventual standardized application of BCP nanopatterning in highly mature practical semiconductor processes requires precise control of pattern orientation and structural defect formation over an arbitrarily large area. Moreover, some other issues related to pattern quality (e.g., line edge roughness and line width roughness) also need to be rigorously addressed.…”
Section: Introductionmentioning
confidence: 99%
“…During the past few decades, the semiconductor world has witnessed the astonishing evolution of electronic chips with the shrinking of the node size at a faster rate than expected. Among several technological aspects responsible for such amazing developments, the remarkable progress in the area of lithography where resist technology plays an important role has been a critical factor. Coping with the fast-changing semiconductor nodes has been a grand challenge for resist developers.…”
Section: Introductionmentioning
confidence: 99%