Internal Resistor Effect of Multilayer-Structured Synaptic Device for Low-Power Operation

Abstract

A synaptic device with a multilayer structure is proposed to reduce the operating power of neuromorphic computing systems while maintaining a high-density integration. A simple metal–insulator–metal (MIM)-structured multilayer synaptic device is developed using an 8-inch wafer-based and complementary metal–oxide–semiconductor (CMOS) fabrication process. The three types of MIM-structured synaptic devices are compared to assess their effects on reducing the operating power. The obtained results exhibited low-power operation owing to the inserted layers acting as an internal resistor. The modulated operational conductance level and simple MIM structure demonstrate the feasibility of implementing both low-power operation and high-density integration in multilayer synaptic devices.

Recent Progress in Wearable Near-Sensor and In-Sensor Intelligent Perception Systems

“…A flexible SFL with conductivity can be made of some conductive materials such as graphene, carbon nanotubes or carbon nanofiber [81][82][83] and combined with flexible organic polymer materials like polydimethylsiloxane (PDMS), thermoplastic polyurethane (TPU) or resin [84][85][86]. What is more, optimizing the piezoresistive sensors' performance requires a microstructure design [87][88][89]. Similarly, the design of flexible front-end processing units is also important for implementing near-sensor perception systems.…”