Intermittent Computing Emulation of Ultralow-Power Processors: Evaluation of Backup Strategies for RISC-V

Philip, Sebin Shaji; Yıldırım, Kasım Sinan; Brunelli, Davide

doi:10.1109/tcad.2022.3169108

Cited by 5 publications

(1 citation statement)

References 31 publications

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“…In these cases, it is difficult to resort to a cloud solution, because of the high latency involved with moving potentially large amount of information across the network [ 47 , 48 ]. Computation is therefore executed on edge devices, which must stand close to the data source (e.g., a video camera, a Lidar) but are typically constrained by the amount of resources and power available [ 49 , 50 ]. Quantization and pruning, as explained above, are therefore essential for an efficient implementation.…”

Section: Cnn and Quantization Backgroundmentioning

confidence: 99%

Quantization-Aware NN Layers with High-throughput FPGA Implementation for Edge AI

Pistellato

Bergamasco

Bigaglia

et al. 2023

Sensors

Self Cite

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Over the past few years, several applications have been extensively exploiting the advantages of deep learning, in particular when using convolutional neural networks (CNNs). The intrinsic flexibility of such models makes them widely adopted in a variety of practical applications, from medical to industrial. In this latter scenario, however, using consumer Personal Computer (PC) hardware is not always suitable for the potential harsh conditions of the working environment and the strict timing that industrial applications typically have. Therefore, the design of custom FPGA (Field Programmable Gate Array) solutions for network inference is gaining massive attention from researchers and companies as well. In this paper, we propose a family of network architectures composed of three kinds of custom layers working with integer arithmetic with a customizable precision (down to just two bits). Such layers are designed to be effectively trained on classical GPUs (Graphics Processing Units) and then synthesized to FPGA hardware for real-time inference. The idea is to provide a trainable quantization layer, called Requantizer, acting both as a non-linear activation for neurons and a value rescaler to match the desired bit precision. This way, the training is not only quantization-aware, but also capable of estimating the optimal scaling coefficients to accommodate both the non-linear nature of the activations and the constraints imposed by the limited precision. In the experimental section, we test the performance of this kind of model while working both on classical PC hardware and a case-study implementation of a signal peak detection device running on a real FPGA. We employ TensorFlow Lite for training and comparison, and use Xilinx FPGAs and Vivado for synthesis and implementation. The results show an accuracy of the quantized networks close to the floating point version, without the need for representative data for calibration as in other approaches, and performance that is better than dedicated peak detection algorithms. The FPGA implementation is able to run in real time at a rate of four gigapixels per second with moderate hardware resources, while achieving a sustained efficiency of 0.5 TOPS/W (tera operations per second per watt), in line with custom integrated hardware accelerators.

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Section: Cnn and Quantization Backgroundmentioning

confidence: 99%

Quantization-Aware NN Layers with High-throughput FPGA Implementation for Edge AI

Pistellato

Bergamasco

Bigaglia

et al. 2023

Sensors

Self Cite

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Improving the Efficiency of Cryptography Algorithms on Resource-Constrained Embedded Systems via RISC-V Instruction Set Extensions

de Araujo Gewehr,

Moraes

2023

2023 36th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design (SBCCI)

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Fine-grained Hardware Acceleration for Efficient Batteryless Intermittent Inference on the Edge

Caronti

Akhunov

Nardello

et al. 2023

ACM Trans. Embed. Comput. Syst.

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Backing up the intermediate results of hardware-accelerated deep inference is crucial to ensure the progress of execution on batteryless computing platforms. However, hardware accelerators in low-power AI platforms only support the one-shot atomic execution of one neural network inference without any backups. This paper introduces a new toolchain for MAX78000, which is a brand-new microcontroller with a hardware-based convolutional neural network (CNN) accelerator. Our toolchain converts any MAX78000-compatible neural network into an intermittently executable form. The toolchain enables finer checkpoint granularity on the MAX78000 CNN accelerator, allowing for backups of any intermediate neural network layer output. Based on the layer-by-layer CNN execution, we propose a new backup technique that performs only necessary (urgent) checkpoints. The method involves the batteryless system switching to ultra-low-power mode while charging, saving intermediate results only when input power is lower than ultra-low-power mode energy consumption. By avoiding unnecessary memory transfer, the proposed solution increases the inference throughput by 1.9 × for simulation and by 1.2 × for real-world setup compared to the coarse-grained baseline execution.

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Intermittent Computing Emulation of Ultralow-Power Processors: Evaluation of Backup Strategies for RISC-V

Cited by 5 publications

References 31 publications

Quantization-Aware NN Layers with High-throughput FPGA Implementation for Edge AI

Quantization-Aware NN Layers with High-throughput FPGA Implementation for Edge AI

Improving the Efficiency of Cryptography Algorithms on Resource-Constrained Embedded Systems via RISC-V Instruction Set Extensions

Fine-grained Hardware Acceleration for Efficient Batteryless Intermittent Inference on the Edge

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