Interlocking obfuscation for anti-tamper hardware

Abstract

Tampering and Reverse Engineering of a chip to extract the hardware Intellectual Property (IP) core or to inject malicious alterations is a major concern. Digital systems susceptible to tampering are of immense concern to defense organizations. First, offshore chip manufacturing allows the design secrets of the IP cores to be transparent to the foundry and other entities along the production chain. Second, small malicious modifications to the design may not be detectable after fabrication without anti-tamper mechanisms. Some techniques have been developed in the past to improve the defense against such attacks but they tend to fall prey to the increasing power of the attacker. We present a new way to protect against tampering by a clever obfuscation of the design, which can be unlocked with a specific, dynamic path traversal. Hence, the functional mode of the controller is hidden with the help of obfuscated states, and the functional mode is made operational only on the formation of a specific interlocked Code-Word during state transition. No comparator is needed as the obfuscation is embedded within the transition function of the state machine itself. A side benefit is that any small alteration will be magnified via the obfuscated design. In other words, an alteration to the design will manifest itself as a large difference in the circuit's functionality. Experimental results on an Advanced Encryption Standard (AES) circuit from the open-source IP-cores suite suggest that the proposed method provides better active defense mechanisms against attacks with nominal (7.8%) area overhead.

DLockout: A Design Lockout Technique for Key Obfuscated RTL IP Designs

“…For example, if an attacker owns n copies of the device where the number of attempts is X for each copy, he can try out different keys on each one. If each device is locked with key bit of size m, still an attacker has to try 2 m /(n * (X − 1)) Obfuscation Area Overhead (typical-case) 3 trials for all copies. Here, during (X-1) th attempt, an attacker would apply fault technique as crossing X th trial would lead to permanent locking.…”

Comparative Analysis of Hardware Obfuscation for IP Protection

“…Another technique that performs the obfuscation on RTL design is proposed in [9] where the authors considered multiple inputs together as code-word s for driving the obfuscated FSM. The key aspect of the design is that, even with wrong code-word, the state of FSM goes from initial entry mode to functional mode, but in that case, the behavior of the functional mode is different.…”

Evolution of Attacks, Threat Models, and Solutions for Virtualized Systems

“…Concerning this set of assumptions, the first thing to consider is how well protected is the physical access to the server hosting the tenants' VMs. Obviously, any device that can be easily accessed, and tampered with, cannot be easily protected (even if some form of hardware mechanism and obfuscation can make this task more difficult [Chakraborty and Bhunia 2009], [Chakraborty and Bhunia 2010], [Desai et al 2013]). Then we need to consider the assumptions at the upper levels.…”