Interfacial oxide growth at silicon∕high-k oxide interfaces: First principles modeling of the Si–HfO2 interface

The influence of the silicon nitride blocking layer thickness on the interface state densities ͑D it ͒ of HfO 2 / SiN x : H gate-stacks on n-type silicon have been analyzed. The blocking layer consisted of 3 to 7 nm thick silicon nitride films directly grown on the silicon substrates by electron-cyclotron-resonance assisted chemical-vapor-deposition. Afterwards, 12 nm thick hafnium oxide films were deposited by high-pressure reactive sputtering. Interface state densities were determined by deep-level transient spectroscopy ͑DLTS͒ and by the high and low frequency capacitance-voltage ͑HLCV͒ method. The HLCV measurements provide interface trap densities in the range of 10 11 cm −2 eV −1 for all the samples. However, a significant increase in about two orders of magnitude was obtained by DLTS for the thinnest silicon nitride barrier layers. In this work we probe that this increase is an artifact due to the effect of traps located at the internal interface existing between the HfO 2 and SiN x : H films. Because charge trapping and discharging are tunneling assisted, these traps are more easily charged or discharged as lower the distance from this interface to the substrate, that is, as thinner the SiN x : H blocking layer. The trapping/detrapping mechanisms increase the amplitude of the capacitance transient and, in consequence, the DLTS signal that have contributions not only from the insulator/substrate interface states but also from the HfO 2 / SiN x : H interlayer traps.

Section: Effect Of Interlayer Trapping and Detrapping On The Determinsupporting

confidence: 74%

Effect of interlayer trapping and detrapping on the determination of interface state densities on high-k dielectric stacks

Castán

Dueñas

García

et al. 2010

“…6 Moreover, as most of the high-k materials, when deposited in direct contact with Si an interfacial layer ͑few nanometers thick͒ is formed. 7 We have confirmed, in an earlier work, the formation of silicon oxide ͑SiO x ͒ as interfacial layer when depositing HfO 2 on Si. 8 This noncontrolled interfacial layer can increase interfacial state density D it and leakage current.…”

Section: Introductionsupporting

confidence: 75%

Influence of interlayer trapping and detrapping mechanisms on the electrical characterization of hafnium oxide/silicon nitride stacks on silicon

García

Dueñas

Castán

et al. 2008

Al/ HfO 2 / SiN x :H/ n-Si metal-insulator-semiconductor capacitors have been studied by electrical characterization. Films of silicon nitride were directly grown on n-type silicon substrates by electron cyclotron resonance assisted chemical vapor deposition. Silicon nitride thickness was varied from 3 to 6.6 nm. Afterwards, 12 nm thick hafnium oxide films were deposited by the highpressure sputtering approach. Interface quality was determined by using current-voltage, capacitance-voltage, deep-level transient spectroscopy ͑DLTS͒, conductance transients, and flatband voltage transient techniques. Leakage currents followed the Poole-Frenkel emission model in all cases. According to the simultaneous measurement of the high and low frequency capacitance voltage curves, the interface trap density obtained for all the samples is in the 10 11 cm −2 eV −1 range. However, a significant increase in this density of about two orders of magnitude was obtained by DLTS for the thinnest silicon nitride interfacial layers. In this work we probe that this increase is an artifact that must be attributed to traps existing at the HfO 2 / SiN x : H intralayer interface. These traps are more easily charged or discharged as this interface comes near to the substrate, that is, as thinner the SiN x : H interface layer is. The trapping/detrapping mechanism increases the capacitance transient and, in consequence, the DLTS measurements have contributions not only from the insulator/substrate interface but also from the HfO 2 / SiN x : H intralayer interface.

“…33 When the density of the dangling bonds in the film is large, Hf can diffuse toward the Si and react with oxygen at the substrate interface. 34,35 The embedded nc-CdSe probably forms an interface layer with ZrHfO, which contains the Cd-Hf or Se-Hf bond just like the Pt-Hf bond formation in the TiN/Pt/HfO 2 /Si structure. 36 There are less Hf dangling bonds in the bulk ZrHfO film to diffuse to the interface layer, which is the cause of the formation of the SiO 2 -like HfSiO x group.…”

Section: Methodsmentioning

confidence: 99%

Memory functions of nanocrystalline cadmium selenide embedded ZrHfO high-k dielectric stack

Lin

Kuo

2014

Metal-oxide-semiconductor capacitors made of the nanocrystalline cadmium selenide nc-CdSe embedded Zr-doped HfO2 high-k stack on the p-type silicon wafer have been fabricated and studied for their charge trapping, detrapping, and retention characteristics. Both holes and electrons can be trapped to the nanocrystal-embedded dielectric stack depending on the polarity of the applied gate voltage. With the same magnitude of applied gate voltage, the sample can trap more holes than electrons. A small amount of holes are loosely trapped at the nc-CdSe/high-k interface and the remaining holes are strongly trapped to the bulk nanocrystalline CdSe site. Charges trapped to the nanocrystals caused the Coulomb blockade effect in the leakage current vs. voltage curve, which is not observed in the control sample. The addition of the nanocrystals to the dielectric film changed the defect density and the physical thickness, which are reflected on the leakage current and the breakdown voltage. More than half of the originally trapped holes can be retained in the embedded nanocrystals for more than 10 yr. The nanocrystalline CdSe embedded high-k stack is a useful gate dielectric for this nonvolatile memory device.