Interface between Al₂O₃and 4H-SiC investigated by time-of-flight medium energy ion scattering

Abstract

The formation of interfacial oxides during heat treatment of dielectric films on 4H-SiC has been studied. The 4H-SiC surface has been carefully prepared to create a clean and abrupt interface to Al 2 O 3 . An amorphous, 3 nm thick, Al 2 O 3 film has been prepared on 4H-SiC by atomic layer deposition and rapid thermal annealing was then performed in N 2 O ambient at 700 °C and 1100 °C during 1 min. The samples were studied by time-of-flight medium energy ion scattering (ToF-MEIS), with sub-nanometer depth resolution and it is seen that, at both annealing temperatures, a thin SiO x (1 ⩽ x ⩽ 2) is formed at the interface. Our results further indicate that carbon remains in the silicon oxide in samples annealed at 700 °C. Additional electrical capacitance voltage measurements indicate that a large concentration of interface traps is formed at this temperature. After 1100 °C annealing, both MEIS and XRD measurements show that these features disappear, in accordance with electrical data.

Influence of annealing environment on the ALD-Al2O3/4H-SiC interface studied through XPS

“…Thus, resulting in relatively low concentration of oxygen at higher temperatures. This further improves the quality of Al 2 O 3 by crystallizing the material at such high temperatures [24,30].…”

“…Also, the hysteresis in CV measurements is mostly observed, where the charge trapping levels can be as high as 10 13 cm −2 , which originates from the native defects in atomic layer deposited (ALD) Al 2 O 3 layer and stays near the interface, typically named as border traps [21,22]. In our previous investigations, we found that the annealing of Al 2 O 3 /SiC structure at 1100 °C process temperature keeps the interface intact and reduces the hysteresis, independent of annealing time duration, and forms a thin SiO 2 interfacial layer between Al 2 O 3 and 4H-SiC [23,24]. The formation of SiO 2 at the interface then reduces the positive flatband shift (indicating negative charges at the interface or in the oxide) observed in various studies.…”

Structural and Insulating Behaviour of High-Permittivity Binary Oxide Thin Films for Silicon Carbide and Gallium Nitride Electronic Devices

“…Hence, the authors concluded that annealing at 900 • C represented the best option in terms of both surface morphology and dielectric quality. On the other hand, many other papers demonstrated that such high annealing temperatures induce the formation of a thin stoichiometric or sub-stoichiometric silicon oxide interfacial layer [33,[50][51][52]. This oxidation phenomenon can have a detrimental impact on the properties of high-κ/SiC interfaces, including in the case of abrupt Al 2 O 3 /4H-SiC interfaces obtained by ALD growth [40,[53][54][55].…”