Interconnect and bonding techniques for pixelated X-ray and gamma-ray detectors

Abstract

In the last decade, the Detector Development Group at the Technology Department of the Science and Technology Facilities Council (STFC), U.K., established a variety of fabrication and bonding techniques to build pixelated X-ray and γ-ray detector systems such as the spectroscopic X-ray imaging detector HEXITEC [1]. The fabrication and bonding of such devices comprises a range of processes including material surface preparation, photolithography, stencil printing, flip-chip and wire bonding of detectors to application-specific integrated circuits (ASIC). This paper presents interconnect and bonding techniques used in the fabrication chain for pixelated detectors assembled at STFC. For this purpose, detector dies (∼ 20 × 20 mm 2 ) of high quality, single crystal semiconductors, such as cadmium zinc telluride (CZT) are cut to the required thickness (up to 5mm). The die surfaces are lapped and polished to a mirror-finish and then individually processed by electroless gold deposition combined with photolithography to form 74×74 arrays of 200 µm × 200 µm pixels with 250 µm pitch. Owing to a lack of availability of CZT wafers, lithography is commonly carried out on individual detector dies which represents a significant technical challenge as the edge of the pixel array and the surrounding guard band lies close to the physical edge of the crystal. Further, such detector dies are flip-chip bonded to readout ASIC using lowtemperature curing silver-loaded epoxy so that the stress between the bonded detector die and the ASIC is minimized. In addition, this reduces crystalline modifications of the detector die that occur at temperature greater than 150 ˚C and have adverse effects on the detector performance. To allow smaller pitch detectors to be bonded, STFC has also developed a compression cold-weld indium bump bonding technique utilising bumps formed by a photolithographic lift-off technique.

Characterization of the Uniformity of High-Flux CdZnTe Material

“…An example of an optical image of the bare HF-CdZnTe sensor can be seen in Figure 1 a. Individual HF-CdZnTe sensors are hybridized to a HEXITEC ASIC using the STFC’s interconnect facilities [ 11 ]. Bumps of silver-loaded epoxy are deposited on each pixel of the sensor using a stencil printing technique; typically, bumps have diameters of ~ 120 μm and heights of 30 μm.…”

“…An example of an optical image of the bare HF-CdZnTe sensor can be seen in Figure 1a. Individual HF-CdZnTe sensors are hybridized to a HEXITEC ASIC using the STFC's interconnect facilities [11].…”

HEXITEC: A High-Energy X-ray Spectroscopic Imaging Detector for Synchrotron Applications

“…Sensors have a large planar platinum cathode and a pixelated aluminium anode with a pad size of 200 m and an inter-pixel gap of 50 m. The sensor is bonded directly to the ASIC using a gold stud and silver-loaded epoxy low temperature process developed at STFC [11]. The bonded devices are mounted on an aluminium module and the I/O pads of the ASIC wire bonded to a readout PCB that is fixed to the module, see Figure 1 (b).…”

Room-temperature performance of 3 mm-thick cadmium–zinc–telluride pixel detectors with sub-millimetre pixelization

“…A low-noise ASIC (PIXIE ASIC), developed at RAL (Didcot, UK) (Allwork et al, 2012;Veale et al, 2011), was flip-chip bonded directly to the detector pixels. The bonding process was performed at RAL by low-temperature curing (< 150 C) silver-loaded epoxy and the gold stud bonding technique (Schneider et al, 2015).…”