Integration of Tunnel-Coupled Double Nanocrystalline Silicon Quantum Dots with a Multiple-Gate Single-Electron Transistor

Kawata, Y.; Khalafalla, M. A. H.; Usami, K.; Tsuchiya, Yoshishige; Mizuta, Hiroshi; Oda, Shunri

doi:10.1143/jjap.46.4386

Cited by 19 publications

(17 citation statements)

References 10 publications

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“…5) In order to apply these bottom-up-made spherical nc-Si dots to silicon nanodevices, we have attempted to integrate them into the top-down-fabricated nanoelectrodes and have already reported on single electron devices, 6) single electron memory, 7) and nanoscale electrometers for quantum information processing. 8) On the other hand, nc-Si dots have been considered as a potential material for optoelectronics application since the time when room temperature photoluminescence (PL) from porous Si was observed by Canham.…”

Section: Introductionmentioning

confidence: 99%

Visible Electroluminescence from Spherical-Shaped Silicon Nanocrystals

Cheong

Tanaka

Hippo

et al. 2008

jjap

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We fabricated light emitting diodes (LEDs) using spherically shaped nanocrystalline silicon (nc-Si), which was formed through very high frequency (VHF; 144 MHz) plasma decomposition of SiH 4 . In addition, we successfully reduced the roughness of the surface and part of the voids separating the dots by finding the adequate annealing conditions. Red electroluminescence was also observed at 12 V with the naked eye at room temperature under forward bias condition. It is suggested that the origin of the electroluminescence (EL) from Si nanocrystals is due to recombination centers in Si nanocrystals by the comparison of EL and photoluminescence spectra.

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Section: Introductionmentioning

confidence: 99%

Visible Electroluminescence from Spherical-Shaped Silicon Nanocrystals

Cheong

Tanaka

Hippo

et al. 2008

jjap

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“…Motivated by this work, we have investigated on silicon-based QIP devices where isolated Si DQDs are used as the charge qubit. For realizing downscaled charge qubits and increasing decoherence time of the qubits further, we have demonstrated integration of double nanocrystalline silicon quantum dots grown by VHF plasma process in a bottom-up manner with a readout and operation gate electrodes fabricated on the silicon-on-insulator (SOI) substrate in a top-down manner by using electron beam lithography and reactive ion etching technique [3]. Toward the scaling up to two-qubits devices, we have proposed a double single-electron transistor (DSET) as a readout [4] and experimentally showed a clearly-defined hexagon pattern in its Coulomb oscillation characteristics [5].…”

Section: Introductionmentioning

confidence: 99%

Detection of single-charge polarisation in silicon double quantum dots by using serially-connected multiple single-electron transistors

Kawata¹,

Oda²,

Tsuchiya

et al. 2008

ESSDERC 2008 - 38th European Solid-State Device Research Conference

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Abstract-We investigate novel serially-connected multiple single-electron transistors (MSETs) as a single-charge polarisation readout for silicon integrated charge qubits. We first design and analyse the double single-electron transistors (DSETs) in which double quantum dots are connected in series with two side gates. We show that the DSETs are sufficiently sensitive to distinguish all the single-charge polarization states on the two charge qubits integrated adjacently. We also show the scalability of the MSETs by extending our analysis to a scaled-up system of serial triple single-electron transistors (TSETs) integrated with triple charge qubits. Finally we fabricate the DSETs with double charge qubits on the silicon-on-insulator substrate and observe hysteresis in the Coulomb oscillations of the tunnel current at temperature of 4.2K, which are attributable to the change of polarisation in the double charge qubits.

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“…The lithographically defined constrictions in the silicon channel act as tunnel barriers as a result of bandgap enlargement in the narrower regions. 11 Higher resolution SEM images of the dot region of devices A, B, and C are shown in Figs. 1͑b͒-1͑d͒, respectively.…”

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Impact of channel constrictions on the formation of multiple tunnel junctions in heavily doped silicon single electron transistors

Manoharan

Oda

Mizuta

2008

Applied Physics Letters

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This paper reports the study of the uncontrolled multiple tunnel junctions ͑MTJs͒ induced by the random dopants in heavily doped silicon single electron transistors ͑SETs͒. The SETs are fabricated by making dual lateral constrictions in the narrow doped silicon channel formed on a silicon on insulator substrate. The doped SETs with relatively long constriction regions invariably exhibit the MTJ characteristics. Silicon based single electron devices ͑SEDs͒ have attracted much attention because of their higher operating temperature, and their compatibility with the complementary metal oxide semiconductor technology. 1,2 Recently, these devices have been more actively studied for qubit 3,4 and nanoelectromechanical systems. 5 In particular, a suspended quantum dot cavity structure can be used to study the interaction of single electrons with phonons, the physics of decoherence mechanisms for quantum bits and electromechanical phenomena such as, phononic bandgaps, phonon confinement, quantization of nanomechanical motion, and a strong coupling of nanomechanical and electron motions. 5 These phenomena may lead to silicon quantum information devices. 6 One of the common approaches to realizing SEDs in silicon is to use a very narrow doped silicon channel with lateral constrictions in a silicon on insulator ͑SOI͒ substrate. 7 However, these devices often exhibit multiple tunnel junction ͑MTJ͒ behaviors irrelevant to their geometrical shapes. 8,9 These MTJs may smear out the fundamental physical phenomena. The theoretical study in Ref. 10 reports the basic mechanism of the electron island formation and electron transport properties in the heavily doped nanowires, but there has been no experimental work reported to address the MTJ issue in these devices. It is imperative to study the MTJ issue and to develop a fabrication method to avoid these unwanted MTJs to study the fundamental physics of nanodevices.In this article, we report the measurement results of three heavily doped single electron transistors ͑SETs͒ with different channel constriction lengths. It was found that longer channel constriction regions invariably lead to random dopant induced MTJs. The influence of the MTJs decreased with decreasing channel constriction length. Finally, it is demonstrated that it is possible to overcome the uncontrolled MTJ formation by fabricating extremely sharp constrictions with low surface disorder.The device formation process is the same as the SET patterning reported in Ref. 11. A scanning electron microscopy ͑SEM͒ image of a typical fabricated SET is shown in Fig. 1͑a͒. The bright regions indicate the SOI layer and the dark regions indicate the BOX layer of the substrate. The lithographically defined constrictions in the silicon channel act as tunnel barriers as a result of bandgap enlargement in the narrower regions. 11 Higher resolution SEM images of the dot region of devices A, B, and C are shown in Figs. 1͑b͒-1͑d͒, respectively. The approximate constriction lengths of devices A, B, and C are 75, 65, and 45 nm, respectiv...

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Integration of Tunnel-Coupled Double Nanocrystalline Silicon Quantum Dots with a Multiple-Gate Single-Electron Transistor

Cited by 19 publications

References 10 publications

Visible Electroluminescence from Spherical-Shaped Silicon Nanocrystals

Visible Electroluminescence from Spherical-Shaped Silicon Nanocrystals

Detection of single-charge polarisation in silicon double quantum dots by using serially-connected multiple single-electron transistors

Impact of channel constrictions on the formation of multiple tunnel junctions in heavily doped silicon single electron transistors

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