Integration of Porogen-Based Low-k Films: Influence of Capping Layer Thickness and Long Thermal Anneals on Low-k Damage and Reliability

Abstract

This paper discusses integration aspects of a porous low-k film (k ∼2.45) cured with a broadband UV lamp. Different process splits are discussed which could contribute to avoid integration induced damage and improve reliability. The main factor contributing to a successful integration is the presence of a thick (protecting) cap layer partially remaining after chemical mechanical polishing (CMP), which leads to yielding structures with a k eff of ∼2.6, a breakdown voltage of ∼6.9 MV/cm and time dependent dielectric breakdown (TDDB) lifetimes in the excess of 100 years. Long thermal anneals restore the k-value but degrade lifetime.

Influence factors of film adhesion criterion of the nondestructive CZM-SAW technique

“…In the back-end process of ultra-large-scale integrated (ULSI) circuits, low-k thin films play an important role, for it can mitigate the crosstalk, interconnection and power consumptions of ICs. [1][2][3] The film adhesion is of great importance in thin film systems for ensuring a good performance, especially in case of layered structure. 4,5) Adhesion mostly depends upon the chemical nature of the bond and thin film/substrate combination, which critically influences the structural stability and functionality, thereby limiting the lifetime and reliability in device.…”

Proposal of New Precursors for Plasma-Enhanced Chemical Vapor Deposition of SiOCH Low-k Films with Plasma Damage Resistance

“…1,4) There appear to be several solutions to these problems. Roest et al 5) employed a capping layer to cover porous low-k films. They successfully generated a single damascene structure with reliable electrical properties and a low-k behavior.…”