Integration of LPCVD-SiN<inf>x</inf> gate dielectric with recessed-gate E-mode GaN MIS-FETs: Toward high performance, high stability and long TDDB lifetime

A Novel GaN Metal-Insulator-Semiconductor High Electron Mobility Transistor Featuring Vertical Gate Structure

“…where φb is the barrier height for gate metal on the dielectric (3.2 eV for Ni on Si3N4), ∆Ec the conduction band offset between Si3N4 and GaN (1.5 eV), φf the conduction band distance from the Fermi-level in GaN (0.2 eV), tox the dielectric thickness (20 nm), εox the permittivity of dielectric (6.6 × 10 −13 F/cm), and ∆Qit the net charge density at the interface (~3.4 × 10 12 cm −2 in this work which is reasonable and reported widely for the III-V group GaN-based materials) [26,27]. The calculated Vth of the VG-HEMT is found to be 3.2 V, which is roughly consistent with the simulation data at 3.1 V. Furthermore, the slight difference of the Vth value between the two devices is mainly caused by the increased drain current and transconductance values in the VG-HEMT considering that the effective vertical gate length is much less than that in the LG-HEMT.…”

Investigation of Recessed Gate AlGaN/GaN MIS-HEMTs with Double AlGaN Barrier Designs toward an Enhancement-Mode Characteristic

“…However, an enhancement mode characteristic is more favorable in practical applications due to a lower power consumption, less failure issues, and a flexible integration. So far, there are several approaches to realize an enhancement mode operation, such as a recessed gate structure [5][6][7], p-GaN/p-AlGaN gate [2,8], Fluoride-based plasma treatment [9], the metal-oxide-semiconductor field-effect transistor structure [10], cascode-based topology in connecting high voltage D-mode HEMTs with a low voltage Si MOSFETs or E-mode HEMTs [11,12], etc. HEMTs with a p-GaN/p-AlGaN gate generally suffer the challenges to effectively dope the Mg into top GaN or AlGaN layer and to remove the top p-GaN/p-AlGaN layer in the access region.…”

“…Therefore, the recessed gate-based HEMT is one of the most popular architectures to obtaining an enhancement-mode characteristic because the 2DEG can be reduced under the gate by using a simple etching process, i.e., Reactive-ion etching (RIE)-based etching or atomic layer etching (ALE). Recently, the recessed gate AlGaN/GaN-based devices show a promising performance toward an enhancement-mode characteristic [5][6][7].…”

High-Performance Nanowire-Based E-Mode Power GaN MOSHEMTs With Large Work-Function Gate Metal

“…However, the presence of a 2D electron gas (2DEG), induced by spontaneous and piezoelectric fields in AlGaN/GaN heterojunction, results naturally in depletion mode (D-mode) operation, which is undesirable for power applications due to safety concerns, and would require an increased complexity for gate drivers. Several methods have been proposed to achieve E-mode devices, among which the most common are based on p-type GaN caplayers [3]- [7], fluorine implantation [8], [9] and gate recess [10]- [14]. These methods rely on depleting the 2DEG under the gate by removing, by treating the AlGaN barrier, or by depositing p-GaN over the barrier.…”