Integration of GaN HEMTs onto Silicon CMOS by micro Transfer Printing

Lerner, Ralf; Eisenbrandt, Stefan; Bower, Christopher A.; Bonafede, Salvatore; Fecioru, Alin; Reiner, Richard; Waltereit, Patrick

doi:10.1109/ispsd.2016.7520875

Cited by 13 publications

(7 citation statements)

References 8 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Particularly, it is already replacing Si in LDMOS radiofrequency devices used in base stations for mobile communication as well as GaAs for radar applications. [1][2][3][4][5][6][7] The highly advantageous properties of GaN-based semiconductors such as high electron mobility and saturation velocity, high sheet carrier concentration at heterojunction interfaces, high breakdown field, and low thermal impedance make them extremely promising for high-power high-temperature microwave applications, as evidenced by their high Johnson's figure of merit. [8][9][10] Exemplary, solid-state lighting optoelectronic devices assembled from white LEDs based on GaN are replacing conventional light sources such as incandescent bulbs and fluorescent lamps nowadays.…”

mentioning

confidence: 99%

Modulation of Electrical Conductivity and Lattice Distortions in Bulk HVPE-Grown GaN

Wolff

Jordt

Braniste

et al. 2019

ECS J. Solid State Sci. Technol.

View full text Add to dashboard Cite

The nature of self-organized three-dimensional structured architectures with spatially modulated electrical conductivity emerging in the process of hydride vapor phase epitaxial growth of single crystalline n-GaN wafers is revealed by photoelectrochemical etching. The amplitude of the carrier concentration modulation throughout the sample is derived from photoluminescence analysis and the localized heterogeneous piezoelectric response is demonstrated. The formation of such architectures is rationalized based on the generation of V-shaped pits and their subsequent overgrowth in variable direction. Detailed structure analysis with respect to X-ray diffraction and transmission electron microscopy gives striking evidence for inelastic strain to manifest in distortions of the P6 3 mc wurtzite-type structure. The deviation from hexagonal symmetry by angular distortions of the β angle between the basal plane and c-axis is found to be of around 1°. It is concluded that the lattice distortions are generated by the misfit strains originating during crystal growth, which are slightly relaxed upon photoelectrochemical etching.

show abstract

mentioning

confidence: 99%

Modulation of Electrical Conductivity and Lattice Distortions in Bulk HVPE-Grown GaN

Wolff

Jordt

Braniste

et al. 2019

ECS J. Solid State Sci. Technol.

View full text Add to dashboard Cite

show abstract

“…Other promising results are shown in [45, 46] with combinations of the highly functional CMOS technology and the high‐performance GaN technologies. However, in general, for costly and complex technologies, the efforts and benefits must be carefully weighed against one another.…”

Section: Discussion and Further Challengesmentioning

confidence: 99%

Monolithically integrated power circuits in high‐voltage GaN‐on‐Si heterojunction technology

Reiner

Waltereit

Weiss

et al. 2018

IET Power Electronics

Self Cite

View full text Add to dashboard Cite

This study presents monolithically integrated power circuits, fabricated in a high-voltage GaN-on-Si heterojunction technology. Different advanced concepts are presented and compared with solutions found in the literature. High switching transition slew rates are demonstrated by means of a monolithic power circuit with integrated gate driver. A highly linear temperature sensor is integrated in a GaN-high-electron-mobility transistor (HEMT) power device for the 600 V class and onstate resistance of 53 mΩ. An area-efficient HEMT structure with integrated freewheeling diodes is presented. This structure is applied in a monolithic multilevel converter chip, as well as in a 600 V class half-bridge chip. The multilevel chip is integrated by an advanced printed circuit board embedding technology and tested in inverter operation with a mains voltage output of 120 V RMS. The performance of the half-bridge is demonstrated in a synchronous buck converter operation from 400 to 200 V and with a switching frequency of 3 MHz.

show abstract

“…This flow is shown in Figure 4. [24], [25], [26]. Additional processing is needed for release, printing and interconnect.…”

Section: Micro-transfer-printing Gan On Cmosmentioning

confidence: 99%

Commercial Sweet Spots for GaN and CMOS Integration by Micro-Transfer-Printing

Lerner¹,

Hansen²

2021

ISPS'21 Proceedings

Self Cite

View full text Add to dashboard Cite

Several approaches for close integration of power switches with CMOS logic are subject of technical evaluations and academic discussions. This paper identifies the commercially relevant processing steps of different integration methods (HV and SOI CMOS, monolithic integration in SOI and in GaN, Direct Wafer Bonding, micro-Transfer-Printing of GaN on CMOS and CMOS on GaN) and compares them on simple cost per wafer and cost per chip models. Four examples of real ICs verify the simple costs per chip model. Commercially attractive high voltage to logic partitionings are identified for the different integration approaches.

show abstract

Integration of GaN HEMTs onto Silicon CMOS by micro Transfer Printing

Cited by 13 publications

References 8 publications

Modulation of Electrical Conductivity and Lattice Distortions in Bulk HVPE-Grown GaN

Modulation of Electrical Conductivity and Lattice Distortions in Bulk HVPE-Grown GaN

Monolithically integrated power circuits in high‐voltage GaN‐on‐Si heterojunction technology

Commercial Sweet Spots for GaN and CMOS Integration by Micro-Transfer-Printing

Contact Info

Product

Resources

About