Integrating transparent conductive oxides to improve the infrared response of silicon solar cells with passivating rear contacts

Abstract

Abstract. This work addresses the development of a transparent conductive oxide (TCO)/metal stack for n-type Si solar cells featuring a tunnel oxide passivating rear contact (TOPCon). While poly-Si based passivating contacts contacted by local fire-through metallization currently show an increased recombination at the metal contacts and a poor infrared (IR) response, we aim to realize a full-area metallization which maintains the high level of surface passivation and avoids IR losses. Some research groups have reported that sputtering TCOs on poly-Si based passivating contacts degrades the surface passivation and unlike the SHJ cells this degradation cannot be cured completely at Tcure ~ 200°C. However, the higher thermal stability of TOPCon allows for higher Tcure of up to 400°C, which can effectively restore the surface passivation. On the other hand, the contact resistivity (ρc) of the TOPCon/ITO/metal contact increased by several orders of magnitude in our test structures during annealing at such high temperatures. Possible reasons like the formation of an interfacial oxide are currently under investigation. Increasing the poly-Si thickness and/or doping mitigated the effect of sputter damage, but this will come at the cost of more parasitic absorption. However, by adapting the sputter and the subsequent annealing process, we were able to realize low damage deposition of ITO (loss in implied Voc ~ 7 mV) on thin, lowly doped poly-Si layers on textured wafers, yielding reasonable contact properties (ρc ~ 40 mΩcm² of the whole rear contact stack).

Monolithic Perovskite/Silicon Tandem Solar Cells Fabricated Using Industrial p‐Type Polycrystalline Silicon on Oxide/Passivated Emitter and Rear Cell Silicon Bottom Cell Technology

“…In particular, this is the case if poly-Si is only a few tens of nanometers thin. [21,22] A PDA at temperatures around 300 C can cure this sputtering damage. [29] Here, we anneal our devices in air after HF treatment and ITO sputtering up to 300 C for 10 min.…”

“…We also apply a soft sputtering deposition technique as another way to mitigate sputtering damage, by reducing the plasma UV radiation on the substrate, increasing the path length of particles, and reducing the kinetic energy of the particles hitting the substrate. [ 22–24 ]…”

“…Here, we adjust the top device process to optimize the device performance. Since it is known that sputtering of a transparent conductive oxide (TCO) on top of poly-Si/c-Si contacts can yield degradation of the passivation quality, [21,22] we performe a postdeposition anneal (PDA) of the ITO recombination junction. We also apply a soft sputtering deposition technique as another way to mitigate sputtering damage, by reducing the plasma UV radiation on the substrate, increasing the path length of particles, and reducing the kinetic energy of the particles hitting the substrate.…”

“…We also apply a soft sputtering deposition technique as another way to mitigate sputtering damage, by reducing the plasma UV radiation on the substrate, increasing the path length of particles, and reducing the kinetic energy of the particles hitting the substrate. [22][23][24] The perovskite top cell is fabricated in a pÀiÀn device architecture. This architecture is chosen to allow the fabrication of a perovskite/silicon tandem solar cell with a well-known top-cell device stack, also used for record perovskite/SHJ tandem devices.…”

Fourteen percent efficiency ultrathin silicon solar cells with improved infrared light management enabled by hole‐selective transition metal oxide full‐area rear passivating contacts

“…Nonetheless, the ρ c values of TMO/p-type c-Si are much lower than those reported from TMO/n-type c-Si, 31,54 and thus, it is safe to state that the hole extraction across the accumulation layer (p-type Si) is more feasible compared to the case of inversion layer (n-type Si). It is worth mentioning that the rear side of the solar cells features micro-pyramids as shown in Figure 2; therefore, the thickness of the thermally evaporated TMO layers on top of the pyramids is expected to be thinner than the thickness measured by SE on polished wafers (by a factor of $0.7) 67 and thus thinner than the thickness used in contact resistivity test structures. Given that the ρ c of Ag/TMO/p-type c-Si decreases with decreasing the TMO thickness, 54 consequently, it can be concluded that in the solar cell, the ρ c of each TMO/Ag layer is slightly lower than those shown in Table 1.…”