Integrating Software and Hardware Verification

Jakobs, Marie-Christine; Platzner, Marco; Wehrheim, Heike; Wiersema, Tobias

doi:10.1007/978-3-319-10181-1_19

Cited by 2 publications

(3 citation statements)

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“…We have presented initial ideas on our co-verification approach in [7]. This paper extends previous work by an elaborate description of the different steps of our methods, a presentation of a tool chain providing full automation of all steps, and a significantly extended evaluation based on 14 custom instructions and 7 analyses on 244 case studies.…”

Section: Introductionmentioning

confidence: 83%

“…The signature of our example is (x 1 , x 2 , x 3 ) → z, which we cannot express in SMT-LIB directly. Therefore, the signature is written as a conjunction of predicates using predicate (= par 0) 7 for each input or output par. The predicates in the conjunction are ordered such that we can relate them to the variables of the CI's prototype.…”

Section: ) Translating Abstract States To Smt-lib Formatmentioning

confidence: 99%

“…Some programs we created ourselves, a few programs are taken from research papers [36]- [38], but most of the programs are from existing benchmarks. We considered programs from the NECLA static analysis benchmarks [39] (including our three previous examples [7]), the VeriSec benchmark suite [40], and the SV-COMP benchmark [41].…”

Section: Programsmentioning

confidence: 99%

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Software/Hardware Co-Verification for Custom Instruction Set Processors

et al. 2021

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Verification of software and processor hardware usually proceeds separately, software analysis relying on the correctness of processors executing machine instructions. This assumption is valid as long as the software runs on standard CPUs that have been extensively validated and are in wide use. However, for processors exploiting custom instruction set extensions to meet performance and energy constraints the validation might be less extensive, challenging the correctness assumption. In this paper we present a novel formal approach for hardware/software co-verification targeting processors with custom instruction set extensions. We detail two different approaches for checking whether the hardware fulfills the requirements expected by the software analysis. The approaches are designed to explore a tradeoff between generality of the verification and computational effort. Then, we describe the integration of software and hardware analyses for both techniques and describe a fully automated tool chain implementing the approaches. Finally, we demonstrate and compare the two approaches on example source code with custom instructions, using state-of-the-art software analysis and hardware verification techniques.

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Section: Introductionmentioning

confidence: 83%

Section: ) Translating Abstract States To Smt-lib Formatmentioning

confidence: 99%