“…1 (left) with explicit modeling of actors and channels onto a many-core target such as shown in Fig. 1 (right), the actors must be properly mapped to individual cores, and the channels must be mapped to proper memories of the target architecture [4,5]. Moreover, a schedule needs to be determined for the actor executions as well as the transport of data from and to the allocated channel memories so as to achieve a short period on the one hand while reducing the required memory footprint and core count on the other hand.…”