Integrated Micromechanical Circuits for RF Front Ends

Nguyen, Nguyen

doi:10.1109/esscir.2006.307523

Cited by 12 publications

(10 citation statements)

References 29 publications

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“…M EMS integration is claimed to be one of the major advances to overcome the needs of future radio-frequency (RF) systems in terms of power consumption and area [1]. One of the most straightforward applications of MEMS resonators for RF systems is filtering, thanks to the high-frequency selectivity of these devices exhibiting quality factors on the order of tens of thousands [2].…”

Section: Introductionmentioning

confidence: 99%

A CMOS–MEMS RF-Tunable Bandpass Filter Based on Two High- $Q$ 22-MHz Polysilicon Clamped-Clamped Beam Resonators

Lopez

Verd

Uranga

et al. 2009

IEEE Electron Device Lett.

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This letter presents the design, fabrication, and demonstration of a CMOS-MEMS filter based on two high-Q submicrometer-scale clamped-clamped beam resonators with resonance frequency around 22 MHz. The MEMS resonators are fabricated with a 0.35-μm CMOS process and monolithically integrated with an on-chip differential amplifier. The CMOS-MEMS resonator shows high-quality factors of 227 in air conditions and 4400 in a vacuum for a bias voltage of 5 V. In air conditions, the CMOS-MEMS parallel filter presents a programmable bandwidth from 100 to 200 kHz with a < 1-dB ripple. In a vacuum, the filter presents a stop-band attenuation of 37 dB and a shape factor as low as 2.5 for a CMOS-compatible bias voltage of 5 V, demonstrating competitive performance compared with the state of the art of not fully integrated MEMS filters. Index Terms-Bandpass filter, CMOS-MEMS, micromechanical filter, system-on-chip.

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Section: Introductionmentioning

confidence: 99%

A CMOS–MEMS RF-Tunable Bandpass Filter Based on Two High- $Q$ 22-MHz Polysilicon Clamped-Clamped Beam Resonators

Lopez

Verd

Uranga

et al. 2009

IEEE Electron Device Lett.

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“…The blocking requirements for simultaneous multi-mode operation imply the need for tunable narrow-band circuits at the antenna interface. Either this function can be provided by a multi-band filtering block [22], in which case the receiver's input can be a wideband low-noise amplifier, or part of this burden can already be taken up in the LNA design, as will be shown in the following section.…”

Section: Receiver Building Blocksmentioning

confidence: 99%

Wireless System and Circuit Design Space in Modern Digital CMOS Technology

Oliveira

Goes

2011

Parametric Analog Signal Amplification Applied to Nanoscale CMOS Technologies

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The ultimate dream of every Software-Defined Radio (SDR) front-end designer is to deliver an RF transceiver that can be reconfigured into every imaginable operating mode, in order to comply with the requirements of all existing and even upcoming communication standards. These include a large range of modes for cellular (2G-2.5G-3G and further), WLAN (802.11a/b/g/n), WPAN (Bluetooth, Zigbee, ...), broadcasting (DAB, DVB, DMB, ...) and positioning (GPS, Galileo) functionality. Obviously, all of them have different center frequency, channel bandwidth, noise levels, interference requirements, transmit spectral mask, etc. As a consequence, the performances of all building blocks in the transceiver must be reconfigurable over an extremely wide range, requiring ultimate creativity from the SDR designer.Reconfigurability is a requirement for SDR functionality, but often one forgets that it can also be an enabler for low power consumption. Indeed, once the flexibility is built into the transceiver, it can be used to adapt the performance of the radio to the actual circumstances, instead of those implied by the worst-case situation of the standard. Since linearity, filtering, noise, bandwidth, etc. can be traded for power consumption in the SDR, a smart controller is able to adapt the radio at runtime to the actual performance required, and hence can reduce the average power consumption of the SDR.In this chapter, several important innovations and concepts will be presented that bring this ultimate dream closer to reality. These include circuits for wideband LO synthesis, multifunctional receiver and transmitter blocks, novel ADC implementations, etc. The result of this all is integrated in the world's first SDR transceiver covering the frequency range from 174 MHz to 6 GHz, implemented in a 1.2V 0.13 μm CMOS technology.

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“…The blocking requirements for simultaneous multi-mode operation imply the need for tunable narrowband circuits at the antenna interface. Either this function can be provided by a multi-band filtering block [9], in which case the receiver's input can be a wideband low-noise amplifier, or part of this burden can be taken up in the low-noise amplifier (LNA) design, as shown in the following section.…”

Section: Receiver Building Blocksmentioning

confidence: 99%

Software‐Defined Radio Front Ends

Hueber¹,

Staszewski

2010

Multi‐Mode/Multi‐Band RF Transceivers for Wireless Communications

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The ultimate dream of every software-defined radio (SDR) front-end architect is to deliver a radio-frequency (RF) transceiver that can be reconfigured into every imaginable operating mode, in order to comply with the requirements of all existing and even upcoming communication standards. These include a large range of modes for cellular (2G-2.5G-3G and further), WLAN (802.11a/b/g/n), WPAN (Bluetooth, Zigbee, etc.), broadcasting (DAB, DVB, DMB, etc.), and positioning (GPS, Galileo) functionalities. Obviously, each of them has different center frequency, channel bandwidth, noise levels, interference requirements, transmit spectral mask, and so on. As a consequence, the performances of all building blocks in the transceiver must be reconfigurable over an extremely wide range, requiring ultimate creativity from the SDR designer.Reconfigurability is a requirement for SDR functionality, but often one forgets that it can also be an enabler for low power consumption. Indeed, once flexibility is built into a transceiver, it can be used to adapt the performance of a radio to the actual circumstances instead of those implied by the worst-case situation of the standard. Since linearity, filtering, noise, bandwidth, and so on, can be traded for power consumption in the SDR, a smart controller is able to adapt the radio at runtime to the actual performance required, and hence can reduce the average power consumption of the SDR.In this chapter, several important innovations and concepts are presented that bring this ultimate dream closer to reality. These include circuits for wideband local oscillator (LO) synthesis, multifunctional receiver and transmitter blocks, and novel ADC (analog-to-digital converter) implementations. The result of all this is integrated in the world's first SDR transceiver covering the frequency range from 174 MHz to 6 GHz, implemented in a 1.2-V 0.13-µm CMOS technology.

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Integrated Micromechanical Circuits for RF Front Ends

Cited by 12 publications

References 29 publications

A CMOS–MEMS RF-Tunable Bandpass Filter Based on Two High- $Q$ 22-MHz Polysilicon Clamped-Clamped Beam Resonators

A CMOS–MEMS RF-Tunable Bandpass Filter Based on Two High- $Q$ 22-MHz Polysilicon Clamped-Clamped Beam Resonators

Wireless System and Circuit Design Space in Modern Digital CMOS Technology

Software‐Defined Radio Front Ends

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