2018
DOI: 10.1016/j.mejo.2018.07.002
|View full text |Cite
|
Sign up to set email alerts
|

Integrated circuit for real-time poly-phase power quality monitoring

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
2
1

Citation Types

0
3
0

Year Published

2018
2018
2020
2020

Publication Types

Select...
4
2

Relationship

0
6

Authors

Journals

citations
Cited by 7 publications
(3 citation statements)
references
References 22 publications
0
3
0
Order By: Relevance
“…Still in phasor estimation context, in Rocha et al (2017) is developed a comparative study among computational algorithms used for phasor estimations in power systems. Also about power measurement, in Araujo et al (2018) an integrated circuit for real-time poly-phase power quality monitoring is presented. Studies about power quality can be found in de Melo urea Soares Carneiro and and Leonardo and Oleskovicz (2018).…”
Section: Power System Operationmentioning
confidence: 99%
“…Still in phasor estimation context, in Rocha et al (2017) is developed a comparative study among computational algorithms used for phasor estimations in power systems. Also about power measurement, in Araujo et al (2018) an integrated circuit for real-time poly-phase power quality monitoring is presented. Studies about power quality can be found in de Melo urea Soares Carneiro and and Leonardo and Oleskovicz (2018).…”
Section: Power System Operationmentioning
confidence: 99%
“…SVC is according to the reactive power to compensate automatically and it is from the grid to absorb reactive power to maintain voltage stability of instruction. Moreover, it is good for power grid reactive power balance [3]. When the system fails, svc can stabilize the system by adjusting reactive power.…”
Section: Introductionmentioning
confidence: 99%
“…In other words, the number of samples needed to reconstruct a signal depends on its bandwidth. However, due to the very short duration and ultrabroadband nature of the transmitted THz signals, this theorem imposes several challenges on the hardware, storage, and subsequent signal processing ultimately leading to stressed out analog-to-digital converters (ADCs) at the receiver side [4,5]. Moreover, the state-of-the art ADCs can only sample at rates around 100 Giga-Samples-per-second (GSas) [6,7], much below the Nyquist rate for THz signals.…”
Section: Introductionmentioning
confidence: 99%