Insight into the Microband Offset and Charge Transport Layer’s Suitability for an Efficient Inverted Perovskite Solar Cell: A Case Study for Tin-Based B-γ-CsSnI₃

Abstract

Inverted stacking of layers or p-i-n configurationbased perovskite solar cells are gaining popularity due to their superior operational stability and lower processing temperatures over conventional stacking. Instead of potentially hazardous Pbbased perovskite solar cells, the B-γ-CsSnI 3 black orthorhombic solar cell is a potential alternative. We carried out a thorough investigation using drift-diffusion numerical modeling based on a pi-n structure with four HTL layers (NiO x , CuO, PEDOT:PSS, and P3HT) and three electron transport layers (ETLs) (C 60 , PDINO, and PCBM). The transport layers are initially filtered based on the micro-offset between the interface layer and the energy levels of the perovskite absorber. At a valence band offset of ∼0.2 eV, for NiO x , a high-power conversion efficiency (PCE) of ∼24% is achieved. PCBM has exhibited the best ETL performance across all HTL combinations due to its efficient electron extraction characteristics. Further, PCE is optimized against concentrations of deep defects in the absorber layer, trap sites in the interfaces, and the doping of the transport layer for a better understanding of the practical devices. To combat the suboptimal electronic transitions belonging to >600 nm wavelength highlighted by density functional theory simulations in the study, we investigated the variations in absorber thickness, revealing ∼1.0 μm as a suitable absorber thickness. We also accounted for temperature and sheet resistance variance and the multiple location spectrum caused by climatic and geographical factors. The findings suggest the suitability of NiO x HTL for PCE > 24%, and it will help experimentalists better understand charge transport.

Numerical simulation of a novel high performance solid‐state dye‐sensitised solar cell based on N719 dye

“…In SCAPS simulations, opting for low shunt resistance values reflects real-world scenarios where defects or leakage paths form within the solar cell during fabrication or due to material properties [82]. These low Rsh values in simulations are explained by various factors; practical solar cells often exhibit defects, such as pinholes, grain boundaries, or impurities, creating unintended current pathways and reducing shunt resistance [83].…”