Input power dividing of Doherty power amplifiers for handset applications

Abstract

The input power drive of Doherty power amplifier (PA) is analyzed and a proper input dividing technique without a coupler is introduced. The efficiency and linearity are enhanced by the uneven power drive and proposed output matching circuits. The PA circuit is realized using a 2-μm InGaP/GaAs HBT process and combined using merged lumped-components for Doherty operation. For wireless broadband (WiBro) application, which has 9.54 dB crest factor and 8.75 MHz bandwidth, the PA has EVM of 3% and PAE of 40.2% at an output power of 26 dBm. This data represents that the PA has an excellent efficiency and linearity performance for handset applications, while eliminating the burden of a coupler.

Energy saving power amplifier design methodologies for mobile wireless communications

“…Through the introduction of a third order harmonic control circuitry at the conventional DPA, further improvement in efficiency is achieved at P bo [37]. Another proposed method is through optimizing the load modulation by designing an integrated optimum input power divider [38]. Recent work has also proposed wideband architecture for LTE application [39], where the bandwidth extension is achieved through the aid of a phase compensation circuit, which ensures the load modulation is performed successfully across a wide range of frequency.…”

Power Amplifiers and Transmitters for Next Generation Mobile Handsets

“…In the early design stage of Doherty amplifier, the output matching network for the load modulation is realized with off-chip lumped elements, resulting in high cost and large size [7]. Recently, there are some advances integrating overall matching network on a chip [4], enhancing the efficiency of each power cell with a harmonic tuned load [17], and optimizing the load modulation characteristic with an optimum input power dividing [21]. One of the remaining important issues for the Doherty amplifier is the wideband operation.…”

A novel broadband power amplifier architecture for high efficiency and high linearity applications

“…Many power amplifier (PA) architectures for high efficiency with good linearity have been investigated intensively for hand-held and battery-driven terminal applications for data centric modern wireless communication [1]- [6]. Many solutions like the Chiriex out-phasing, Envelope Tracking (ET) and Doherty architectures have been proposed.…”